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161 lines
5.0 KiB
161 lines
5.0 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Renesas MSIOF SPI controller |
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maintainers: |
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- Geert Uytterhoeven <[email protected]> |
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allOf: |
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- $ref: spi-controller.yaml# |
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properties: |
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compatible: |
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oneOf: |
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- items: |
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- const: renesas,msiof-sh73a0 # SH-Mobile AG5 |
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- const: renesas,sh-mobile-msiof # generic SH-Mobile compatible |
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# device |
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- items: |
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- enum: |
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- renesas,msiof-r8a7742 # RZ/G1H |
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- renesas,msiof-r8a7743 # RZ/G1M |
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- renesas,msiof-r8a7744 # RZ/G1N |
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- renesas,msiof-r8a7745 # RZ/G1E |
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- renesas,msiof-r8a77470 # RZ/G1C |
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- renesas,msiof-r8a7790 # R-Car H2 |
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- renesas,msiof-r8a7791 # R-Car M2-W |
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- renesas,msiof-r8a7792 # R-Car V2H |
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- renesas,msiof-r8a7793 # R-Car M2-N |
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- renesas,msiof-r8a7794 # R-Car E2 |
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- const: renesas,rcar-gen2-msiof # generic R-Car Gen2 and RZ/G1 |
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# compatible device |
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- items: |
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- enum: |
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- renesas,msiof-r8a774a1 # RZ/G2M |
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- renesas,msiof-r8a774b1 # RZ/G2N |
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- renesas,msiof-r8a774c0 # RZ/G2E |
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- renesas,msiof-r8a774e1 # RZ/G2H |
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- renesas,msiof-r8a7795 # R-Car H3 |
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- renesas,msiof-r8a7796 # R-Car M3-W |
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- renesas,msiof-r8a77961 # R-Car M3-W+ |
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- renesas,msiof-r8a77965 # R-Car M3-N |
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- renesas,msiof-r8a77970 # R-Car V3M |
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- renesas,msiof-r8a77980 # R-Car V3H |
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- renesas,msiof-r8a77990 # R-Car E3 |
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- renesas,msiof-r8a77995 # R-Car D3 |
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- renesas,msiof-r8a779a0 # R-Car V3U |
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- const: renesas,rcar-gen3-msiof # generic R-Car Gen3 and RZ/G2 |
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# compatible device |
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- items: |
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- const: renesas,sh-msiof # deprecated |
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reg: |
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minItems: 1 |
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maxItems: 2 |
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oneOf: |
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- items: |
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- description: CPU and DMA engine registers |
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- items: |
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- description: CPU registers |
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- description: DMA engine registers |
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interrupts: |
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maxItems: 1 |
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clocks: |
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maxItems: 1 |
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num-cs: |
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description: | |
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Total number of chip selects (default is 1). |
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Up to 3 native chip selects are supported: |
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0: MSIOF_SYNC |
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1: MSIOF_SS1 |
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2: MSIOF_SS2 |
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Hardware limitations related to chip selects: |
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- Native chip selects are always deasserted in between transfers |
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that are part of the same message. Use cs-gpios to work around |
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this. |
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- All slaves using native chip selects must use the same spi-cs-high |
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configuration. Use cs-gpios to work around this. |
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- When using GPIO chip selects, at least one native chip select must |
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be left unused, as it will be driven anyway. |
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minimum: 1 |
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maximum: 3 |
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default: 1 |
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dmas: |
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minItems: 2 |
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maxItems: 4 |
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dma-names: |
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minItems: 2 |
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maxItems: 4 |
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items: |
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enum: [ tx, rx ] |
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renesas,dtdl: |
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description: delay sync signal (setup) in transmit mode. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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enum: |
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- 0 # no bit delay |
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- 50 # 0.5-clock-cycle delay |
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- 100 # 1-clock-cycle delay |
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- 150 # 1.5-clock-cycle delay |
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- 200 # 2-clock-cycle delay |
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renesas,syncdl: |
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description: delay sync signal (hold) in transmit mode |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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enum: |
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- 0 # no bit delay |
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- 50 # 0.5-clock-cycle delay |
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- 100 # 1-clock-cycle delay |
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- 150 # 1.5-clock-cycle delay |
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- 200 # 2-clock-cycle delay |
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- 300 # 3-clock-cycle delay |
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renesas,tx-fifo-size: |
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# deprecated for soctype-specific bindings |
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description: | |
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Override the default TX fifo size. Unit is words. Ignored if 0. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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maxItems: 1 |
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default: 64 |
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renesas,rx-fifo-size: |
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# deprecated for soctype-specific bindings |
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description: | |
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Override the default RX fifo size. Unit is words. Ignored if 0. |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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maxItems: 1 |
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default: 64 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- '#address-cells' |
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- '#size-cells' |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/r8a7791-clock.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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msiof0: spi@e6e20000 { |
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compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof"; |
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reg = <0xe6e20000 0x0064>; |
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; |
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dmas = <&dmac0 0x51>, <&dmac0 0x52>; |
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dma-names = "tx", "rx"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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};
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