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80 lines
2.4 KiB
80 lines
2.4 KiB
TI Davinci DSP devices |
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======================= |
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Binding status: Unstable - Subject to changes for DT representation of clocks |
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and resets |
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The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that |
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is used to offload some of the processor-intensive tasks or algorithms, for |
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achieving various system level goals. |
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The processor cores in the sub-system usually contain additional sub-modules |
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like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory |
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controller, a dedicated local power/sleep controller etc. The DSP processor |
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core used in Davinci SoCs is usually a C674x DSP CPU. |
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DSP Device Node: |
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================ |
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Each DSP Core sub-system is represented as a single DT node. |
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Required properties: |
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-------------------- |
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The following are the mandatory properties: |
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- compatible: Should be one of the following, |
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"ti,da850-dsp" for DSPs on OMAP-L138 SoCs |
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- reg: Should contain an entry for each value in 'reg-names'. |
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Each entry should have the memory region's start address |
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and the size of the region, the representation matching |
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the parent node's '#address-cells' and '#size-cells' values. |
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- reg-names: Should contain strings with the following names, each |
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representing a specific internal memory region or a |
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specific register space, |
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"l2sram", "l1pram", "l1dram", "host1cfg", "chipsig_base" |
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- interrupts: Should contain the interrupt number used to receive the |
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interrupts from the DSP. The value should follow the |
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interrupt-specifier format as dictated by the |
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'interrupt-parent' node. |
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- memory-region: phandle to the reserved memory node to be associated |
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with the remoteproc device. The reserved memory node |
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can be a CMA memory node, and should be defined as |
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per the bindings in |
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
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Example: |
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-------- |
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/* DSP Reserved Memory node */ |
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reserved-memory { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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dsp_memory_region: dsp-memory@c3000000 { |
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compatible = "shared-dma-pool"; |
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reg = <0xc3000000 0x1000000>; |
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reusable; |
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}; |
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}; |
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/* DSP node */ |
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{ |
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dsp: dsp@11800000 { |
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compatible = "ti,da850-dsp"; |
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reg = <0x11800000 0x40000>, |
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<0x11e00000 0x8000>, |
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<0x11f00000 0x8000>, |
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<0x01c14044 0x4>, |
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<0x01c14174 0x8>; |
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reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", |
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"chipsig"; |
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interrupt-parent = <&intc>; |
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interrupts = <28>; |
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memory-region = <&dsp_memory_region>; |
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}; |
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};
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