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81 lines
2.2 KiB
81 lines
2.2 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Renesas R-Car PWM Timer Controller |
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maintainers: |
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- Yoshihiro Shimoda <[email protected]> |
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properties: |
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compatible: |
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items: |
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- enum: |
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- renesas,pwm-r8a7742 # RZ/G1H |
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- renesas,pwm-r8a7743 # RZ/G1M |
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- renesas,pwm-r8a7744 # RZ/G1N |
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- renesas,pwm-r8a7745 # RZ/G1E |
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- renesas,pwm-r8a77470 # RZ/G1C |
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- renesas,pwm-r8a774a1 # RZ/G2M |
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- renesas,pwm-r8a774b1 # RZ/G2N |
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- renesas,pwm-r8a774c0 # RZ/G2E |
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- renesas,pwm-r8a774e1 # RZ/G2H |
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- renesas,pwm-r8a7778 # R-Car M1A |
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- renesas,pwm-r8a7779 # R-Car H1 |
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- renesas,pwm-r8a7790 # R-Car H2 |
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- renesas,pwm-r8a7791 # R-Car M2-W |
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- renesas,pwm-r8a7794 # R-Car E2 |
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- renesas,pwm-r8a7795 # R-Car H3 |
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- renesas,pwm-r8a7796 # R-Car M3-W |
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- renesas,pwm-r8a77961 # R-Car M3-W+ |
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- renesas,pwm-r8a77965 # R-Car M3-N |
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- renesas,pwm-r8a77970 # R-Car V3M |
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- renesas,pwm-r8a77980 # R-Car V3H |
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- renesas,pwm-r8a77990 # R-Car E3 |
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- renesas,pwm-r8a77995 # R-Car D3 |
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- const: renesas,pwm-rcar |
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reg: |
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# base address and length of the registers block for the PWM. |
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maxItems: 1 |
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'#pwm-cells': |
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# should be 2. See pwm.yaml in this directory for a description of |
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# the cells format. |
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const: 2 |
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clocks: |
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# clock phandle and specifier pair. |
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maxItems: 1 |
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power-domains: |
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maxItems: 1 |
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resets: |
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maxItems: 1 |
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required: |
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- compatible |
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- reg |
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- '#pwm-cells' |
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- clocks |
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additionalProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/r8a7743-cpg-mssr.h> |
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#include <dt-bindings/power/r8a7743-sysc.h> |
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pwm0: pwm@e6e30000 { |
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compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; |
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reg = <0xe6e30000 0x8>; |
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clocks = <&cpg CPG_MOD 523>; |
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power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
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resets = <&cpg 523>; |
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#pwm-cells = <2>; |
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pinctrl-0 = <&pwm0_pins>; |
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pinctrl-names = "default"; |
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};
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