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121 lines
3.2 KiB
121 lines
3.2 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Samsung SoC PWM timers |
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maintainers: |
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- Thierry Reding <[email protected]> |
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- Krzysztof Kozlowski <[email protected]> |
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description: |+ |
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Samsung SoCs contain PWM timer blocks which can be used for system clock source |
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and clock event timers, as well as to drive SoC outputs with PWM signal. Each |
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PWM timer block provides 5 PWM channels (not all of them can drive physical |
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outputs - see SoC and board manual). |
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Be aware that the clocksource driver supports only uniprocessor systems. |
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properties: |
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compatible: |
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enum: |
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- samsung,s3c2410-pwm # 16-bit, S3C24xx |
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- samsung,s3c6400-pwm # 32-bit, S3C64xx |
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- samsung,s5p6440-pwm # 32-bit, S5P64x0 |
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- samsung,s5pc100-pwm # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs |
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- samsung,exynos4210-pwm # 32-bit, Exynos |
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reg: |
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maxItems: 1 |
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clocks: |
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minItems: 1 |
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maxItems: 3 |
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clock-names: |
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description: | |
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Should contain all following required clock names: |
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- "timers" - PWM base clock used to generate PWM signals, |
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and any subset of following optional clock names: |
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- "pwm-tclk0" - first external PWM clock source, |
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- "pwm-tclk1" - second external PWM clock source. |
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Note that not all IP variants allow using all external clock sources. |
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Refer to SoC documentation to learn which clock source configurations |
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are available. |
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oneOf: |
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- items: |
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- const: timers |
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- items: |
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- const: timers |
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- const: pwm-tclk0 |
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- items: |
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- const: timers |
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- const: pwm-tclk1 |
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- items: |
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- const: timers |
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- const: pwm-tclk0 |
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- const: pwm-tclk1 |
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interrupts: |
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description: |
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One interrupt per timer, starting at timer 0. Necessary only for SoCs which |
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use PWM clocksource. |
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minItems: 1 |
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maxItems: 5 |
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"#pwm-cells": |
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description: |
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The only third cell flag supported by this binding |
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is PWM_POLARITY_INVERTED. |
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const: 3 |
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samsung,pwm-outputs: |
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description: |
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A list of PWM channels used as PWM outputs on particular platform. |
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It is an array of up to 5 elements being indices of PWM channels |
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(from 0 to 4), the order does not matter. |
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$ref: /schemas/types.yaml#/definitions/uint32-array |
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uniqueItems: true |
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items: |
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minimum: 0 |
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maximum: 4 |
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required: |
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- clocks |
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- clock-names |
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- compatible |
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- "#pwm-cells" |
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- reg |
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additionalProperties: false |
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allOf: |
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- $ref: pwm.yaml# |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- samsung,s3c2410-pwm |
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- samsung,s3c6400-pwm |
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- samsung,s5p6440-pwm |
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- samsung,s5pc100-pwm |
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then: |
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required: |
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- interrupts |
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examples: |
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- | |
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pwm@7f006000 { |
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compatible = "samsung,s3c6400-pwm"; |
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reg = <0x7f006000 0x1000>; |
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interrupt-parent = <&vic0>; |
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interrupts = <23>, <24>, <25>, <27>, <28>; |
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clocks = <&clock 67>; |
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clock-names = "timers"; |
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samsung,pwm-outputs = <0>, <1>; |
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#pwm-cells = <3>; |
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};
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