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132 lines
2.6 KiB
132 lines
2.6 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Allwinner A80 USB PHY Device Tree Bindings |
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maintainers: |
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- Chen-Yu Tsai <[email protected]> |
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- Maxime Ripard <[email protected]> |
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properties: |
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"#phy-cells": |
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const: 0 |
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compatible: |
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const: allwinner,sun9i-a80-usb-phy |
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reg: |
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maxItems: 1 |
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clocks: |
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anyOf: |
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- maxItems: 1 |
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description: Main PHY Clock |
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- items: |
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- description: Main PHY clock |
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- description: HSIC 12MHz clock |
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- description: HSIC 480MHz clock |
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clock-names: |
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oneOf: |
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- const: phy |
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- items: |
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- const: phy |
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- const: hsic_12M |
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- const: hsic_480M |
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resets: |
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minItems: 1 |
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items: |
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- description: Normal USB PHY reset |
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- description: HSIC Reset |
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reset-names: |
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minItems: 1 |
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items: |
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- const: phy |
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- const: hsic |
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phy_type: |
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const: hsic |
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description: |
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When absent, the PHY type will be assumed to be normal USB. |
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phy-supply: |
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description: |
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Regulator that powers VBUS |
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required: |
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- "#phy-cells" |
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- compatible |
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- reg |
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- clocks |
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- clock-names |
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- resets |
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- reset-names |
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additionalProperties: false |
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if: |
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properties: |
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phy_type: |
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const: hsic |
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required: |
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- phy_type |
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then: |
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properties: |
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clocks: |
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maxItems: 3 |
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clock-names: |
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maxItems: 3 |
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resets: |
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maxItems: 2 |
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reset-names: |
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maxItems: 2 |
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examples: |
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- | |
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#include <dt-bindings/clock/sun9i-a80-usb.h> |
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#include <dt-bindings/reset/sun9i-a80-usb.h> |
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usbphy1: phy@a00800 { |
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compatible = "allwinner,sun9i-a80-usb-phy"; |
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reg = <0x00a00800 0x4>; |
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clocks = <&usb_clocks CLK_USB0_PHY>; |
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clock-names = "phy"; |
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resets = <&usb_clocks RST_USB0_PHY>; |
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reset-names = "phy"; |
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phy-supply = <®_usb1_vbus>; |
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#phy-cells = <0>; |
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}; |
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- | |
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#include <dt-bindings/clock/sun9i-a80-usb.h> |
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#include <dt-bindings/reset/sun9i-a80-usb.h> |
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usbphy3: phy@a02800 { |
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compatible = "allwinner,sun9i-a80-usb-phy"; |
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reg = <0x00a02800 0x4>; |
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clocks = <&usb_clocks CLK_USB2_PHY>, |
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<&usb_clocks CLK_USB_HSIC>, |
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<&usb_clocks CLK_USB2_HSIC>; |
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clock-names = "phy", |
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"hsic_12M", |
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"hsic_480M"; |
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resets = <&usb_clocks RST_USB2_PHY>, |
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<&usb_clocks RST_USB2_HSIC>; |
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reset-names = "phy", |
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"hsic"; |
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phy_type = "hsic"; |
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phy-supply = <®_usb3_vbus>; |
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#phy-cells = <0>; |
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};
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