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59 lines
1.4 KiB
59 lines
1.4 KiB
Ralink Frame Engine Ethernet controller |
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The Ralink frame engine ethernet controller can be found on Ralink and |
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Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8). |
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Depending on the SoC, there is a number of ports connected to the CPU port |
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directly and/or via a (gigabit-)switch. |
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* Ethernet controller node |
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Required properties: |
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- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth", |
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"ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth", |
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"mediatek,mt7620-eth", "mediatek,mt7621-eth" |
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- reg: Address and length of the register set for the device |
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- interrupts: Should contain the frame engines interrupt |
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- resets: Should contain the frame engines resets |
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- reset-names: Should contain the reset names "fe". If a switch is present |
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"esw" is also required. |
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* Ethernet port node |
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Required properties: |
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- compatible: Should be "ralink,eth-port" |
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- reg: The number of the physical port |
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- phy-handle: reference to the node describing the phy |
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Example: |
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mdio-bus { |
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... |
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phy0: ethernet-phy@0 { |
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phy-mode = "mii"; |
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reg = <0>; |
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}; |
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}; |
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ethernet@400000 { |
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compatible = "ralink,rt2880-eth"; |
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reg = <0x00400000 10000>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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resets = <&rstctrl 18>; |
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reset-names = "fe"; |
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interrupt-parent = <&cpuintc>; |
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interrupts = <5>; |
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port@0 { |
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compatible = "ralink,eth-port"; |
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reg = <0>; |
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phy-handle = <&phy0>; |
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}; |
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};
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