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35 lines
1.1 KiB
35 lines
1.1 KiB
* ASPEED AST2400 and AST2500 coprocessor interrupt controller |
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This file describes the bindings for the interrupt controller present |
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in the AST2400 and AST2500 BMC SoCs which provides interrupt to the |
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ColdFire coprocessor. |
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It is not a normal interrupt controller and it would be rather |
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inconvenient to create an interrupt tree for it as it somewhat shares |
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some of the same sources as the main ARM interrupt controller but with |
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different numbers. |
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The AST2500 supports a SW generated interrupt |
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Required properties: |
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- reg: address and length of the register for the device. |
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- compatible: "aspeed,cvic" and one of: |
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"aspeed,ast2400-cvic" |
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or |
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"aspeed,ast2500-cvic" |
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- valid-sources: One cell, bitmap of supported sources for the implementation |
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Optional properties; |
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- copro-sw-interrupts: List of interrupt numbers that can be used as |
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SW interrupts from the ARM to the coprocessor. |
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(AST2500 only) |
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Example: |
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cvic: copro-interrupt-controller@1e6c2000 { |
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compatible = "aspeed,ast2500-cvic"; |
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valid-sources = <0xffffffff>; |
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copro-sw-interrupts = <1>; |
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reg = <0x1e6c2000 0x80>; |
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};
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