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47 lines
1.5 KiB
47 lines
1.5 KiB
Device tree bindings for ARM PL353 static memory controller |
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PL353 static memory controller supports two kinds of memory |
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interfaces.i.e NAND and SRAM/NOR interfaces. |
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The actual devices are instantiated from the child nodes of pl353 smc node. |
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Required properties: |
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- compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell". |
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- reg : Controller registers map and length. |
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- clock-names : List of input clock names - "memclk", "apb_pclk" |
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(See clock bindings for details). |
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- clocks : Clock phandles (see clock bindings for details). |
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- address-cells : Must be 2. |
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- size-cells : Must be 1. |
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Child nodes: |
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For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are |
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supported as child nodes. |
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for NAND partition information please refer the below file |
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Documentation/devicetree/bindings/mtd/partition.txt |
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Example: |
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smcc: memory-controller@e000e000 |
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compatible = "arm,pl353-smc-r2p1", "arm,primecell"; |
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clock-names = "memclk", "apb_pclk"; |
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clocks = <&clkc 11>, <&clkc 44>; |
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reg = <0xe000e000 0x1000>; |
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#address-cells = <2>; |
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#size-cells = <1>; |
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ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region |
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0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region |
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0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region |
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nand_0: flash@e1000000 { |
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compatible = "arm,pl353-nand-r2p1" |
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reg = <0 0 0x1000000>; |
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(...) |
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}; |
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nor0: flash@e2000000 { |
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compatible = "cfi-flash"; |
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reg = <1 0 0x2000000>; |
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}; |
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nor1: flash@e4000000 { |
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compatible = "cfi-flash"; |
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reg = <2 0 0x2000000>; |
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}; |
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};
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