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64 lines
2.3 KiB
64 lines
2.3 KiB
* QCOM IOMMU |
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The MSM IOMMU is an implementation compatible with the ARM VMSA short |
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descriptor page tables. It provides address translation for bus masters outside |
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of the CPU, each connected to the IOMMU through a port called micro-TLB. |
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Required Properties: |
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- compatible: Must contain "qcom,apq8064-iommu". |
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- reg: Base address and size of the IOMMU registers. |
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- interrupts: Specifiers for the MMU fault interrupts. For instances that |
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support secure mode two interrupts must be specified, for non-secure and |
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secure mode, in that order. For instances that don't support secure mode a |
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single interrupt must be specified. |
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- #iommu-cells: The number of cells needed to specify the stream id. This |
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is always 1. |
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- qcom,ncb: The total number of context banks in the IOMMU. |
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- clocks : List of clocks to be used during SMMU register access. See |
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Documentation/devicetree/bindings/clock/clock-bindings.txt |
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for information about the format. For each clock specified |
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here, there must be a corresponding entry in clock-names |
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(see below). |
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- clock-names : List of clock names corresponding to the clocks specified in |
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the "clocks" property (above). |
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Should be "smmu_pclk" for specifying the interface clock |
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required for iommu's register accesses. |
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Should be "smmu_clk" for specifying the functional clock |
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required by iommu for bus accesses. |
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Each bus master connected to an IOMMU must reference the IOMMU in its device |
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node with the following property: |
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- iommus: A reference to the IOMMU in multiple cells. The first cell is a |
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phandle to the IOMMU and the second cell is the stream id. |
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A single master device can be connected to more than one iommu |
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and multiple contexts in each of the iommu. So multiple entries |
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are required to list all the iommus and the stream ids that the |
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master is connected to. |
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Example: mdp iommu and its bus master |
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mdp_port0: iommu@7500000 { |
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compatible = "qcom,apq8064-iommu"; |
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#iommu-cells = <1>; |
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clock-names = |
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"smmu_pclk", |
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"smmu_clk"; |
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clocks = |
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<&mmcc SMMU_AHB_CLK>, |
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<&mmcc MDP_AXI_CLK>; |
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reg = <0x07500000 0x100000>; |
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interrupts = |
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<GIC_SPI 63 0>, |
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<GIC_SPI 64 0>; |
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qcom,ncb = <2>; |
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}; |
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mdp: qcom,mdp@5100000 { |
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compatible = "qcom,mdp"; |
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... |
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iommus = <&mdp_port0 0 |
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&mdp_port0 2>; |
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};
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