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74 lines
2.5 KiB
74 lines
2.5 KiB
Rockchip DWC HDMI TX Encoder |
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============================ |
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The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP |
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with a companion PHY IP. |
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These DT bindings follow the Synopsys DWC HDMI TX bindings defined in |
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Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the |
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following device-specific properties. |
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Required properties: |
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- compatible: should be one of the following: |
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"rockchip,rk3228-dw-hdmi" |
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"rockchip,rk3288-dw-hdmi" |
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"rockchip,rk3328-dw-hdmi" |
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"rockchip,rk3399-dw-hdmi" |
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- reg: See dw_hdmi.txt. |
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- reg-io-width: See dw_hdmi.txt. Shall be 4. |
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- interrupts: HDMI interrupt number |
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- clocks: See dw_hdmi.txt. |
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- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt. |
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- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0 |
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corresponding to the video input of the controller. The port shall have two |
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endpoints, numbered 0 and 1, connected respectively to the vopb and vopl. |
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- rockchip,grf: Shall reference the GRF to mux vopl/vopb. |
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Optional properties |
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- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master |
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or the functionally-reduced I2C master contained in the DWC HDMI. When |
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connected to a system I2C master this property contains a phandle to that |
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I2C master controller. |
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- clock-names: See dw_hdmi.txt. The "cec" clock is optional. |
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- clock-names: May contain "cec" as defined in dw_hdmi.txt. |
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- clock-names: May contain "grf", power for grf io. |
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- clock-names: May contain "vpll", external clock for some hdmi phy. |
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- phys: from general PHY binding: the phandle for the PHY device. |
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- phy-names: Should be "hdmi" if phys references an external phy. |
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Optional pinctrl entry: |
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- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi |
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will switch to the unwedge pinctrl state for 10ms if it ever gets an |
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i2c timeout. It's intended that this unwedge pinctrl entry will |
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cause the SDA line to be driven low to work around a hardware |
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errata. |
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Example: |
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hdmi: hdmi@ff980000 { |
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compatible = "rockchip,rk3288-dw-hdmi"; |
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reg = <0xff980000 0x20000>; |
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reg-io-width = <4>; |
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ddc-i2c-bus = <&i2c5>; |
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rockchip,grf = <&grf>; |
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; |
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clock-names = "iahb", "isfr"; |
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ports { |
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hdmi_in: port { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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hdmi_in_vopb: endpoint@0 { |
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reg = <0>; |
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remote-endpoint = <&vopb_out_hdmi>; |
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}; |
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hdmi_in_vopl: endpoint@1 { |
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reg = <1>; |
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remote-endpoint = <&vopl_out_hdmi>; |
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}; |
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}; |
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}; |
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};
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