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162 lines
4.2 KiB
162 lines
4.2 KiB
Freescale i.MX DRM master device |
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================================ |
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The freescale i.MX DRM master device is a virtual device needed to list all |
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IPU or other display interface nodes that comprise the graphics subsystem. |
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Required properties: |
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- compatible: Should be "fsl,imx-display-subsystem" |
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- ports: Should contain a list of phandles pointing to display interface ports |
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of IPU devices |
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example: |
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display-subsystem { |
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compatible = "fsl,imx-display-subsystem"; |
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ports = <&ipu_di0>; |
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}; |
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Freescale i.MX IPUv3 |
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==================== |
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Required properties: |
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- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of |
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- imx51 |
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- imx53 |
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- imx6q |
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- imx6qp |
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- reg: should be register base and length as documented in the |
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datasheet |
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- interrupts: Should contain sync interrupt and error interrupt, |
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in this order. |
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- resets: phandle pointing to the system reset controller and |
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reset line index, see reset/fsl,imx-src.txt for details |
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Additional required properties for fsl,imx6qp-ipu: |
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- fsl,prg: phandle to prg node associated with this IPU instance |
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Optional properties: |
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- port@[0-3]: Port nodes with endpoint definitions as defined in |
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Documentation/devicetree/bindings/media/video-interfaces.txt. |
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Ports 0 and 1 should correspond to CSI0 and CSI1, |
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ports 2 and 3 should correspond to DI0 and DI1, respectively. |
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example: |
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ipu: ipu@18000000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "fsl,imx53-ipu"; |
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reg = <0x18000000 0x080000000>; |
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interrupts = <11 10>; |
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resets = <&src 2>; |
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ipu_di0: port@2 { |
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reg = <2>; |
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ipu_di0_disp0: endpoint { |
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remote-endpoint = <&display_in>; |
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}; |
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}; |
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}; |
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Freescale i.MX PRE (Prefetch Resolve Engine) |
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============================================ |
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Required properties: |
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- compatible: should be "fsl,imx6qp-pre" |
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- reg: should be register base and length as documented in the |
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datasheet |
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- clocks : phandle to the PRE axi clock input, as described |
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in Documentation/devicetree/bindings/clock/clock-bindings.txt and |
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Documentation/devicetree/bindings/clock/imx6q-clock.yaml. |
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- clock-names: should be "axi" |
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- interrupts: should contain the PRE interrupt |
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- fsl,iram: phandle pointing to the mmio-sram device node, that should be |
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used for the PRE SRAM double buffer. |
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example: |
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pre@21c8000 { |
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compatible = "fsl,imx6qp-pre"; |
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reg = <0x021c8000 0x1000>; |
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interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; |
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clocks = <&clks IMX6QDL_CLK_PRE0>; |
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clock-names = "axi"; |
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fsl,iram = <&ocram2>; |
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}; |
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Freescale i.MX PRG (Prefetch Resolve Gasket) |
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============================================ |
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Required properties: |
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- compatible: should be "fsl,imx6qp-prg" |
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- reg: should be register base and length as documented in the |
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datasheet |
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- clocks : phandles to the PRG ipg and axi clock inputs, as described |
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in Documentation/devicetree/bindings/clock/clock-bindings.txt and |
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Documentation/devicetree/bindings/clock/imx6q-clock.yaml. |
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- clock-names: should be "ipg" and "axi" |
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- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed |
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PRE as the first entry and the muxable PREs following. |
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example: |
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prg@21cc000 { |
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compatible = "fsl,imx6qp-prg"; |
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reg = <0x021cc000 0x1000>; |
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clocks = <&clks IMX6QDL_CLK_PRG0_APB>, |
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<&clks IMX6QDL_CLK_PRG0_AXI>; |
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clock-names = "ipg", "axi"; |
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fsl,pres = <&pre1>, <&pre2>, <&pre3>; |
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}; |
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Parallel display support |
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======================== |
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Required properties: |
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- compatible: Should be "fsl,imx-parallel-display" |
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Optional properties: |
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- interface-pix-fmt: How this display is connected to the |
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display interface. Currently supported types: "rgb24", "rgb565", "bgr666" |
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and "lvds666". |
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- edid: verbatim EDID data block describing attached display. |
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- ddc: phandle describing the i2c bus handling the display data |
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channel |
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- port@[0-1]: Port nodes with endpoint definitions as defined in |
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Documentation/devicetree/bindings/media/video-interfaces.txt. |
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Port 0 is the input port connected to the IPU display interface, |
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port 1 is the output port connected to a panel. |
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example: |
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disp0 { |
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compatible = "fsl,imx-parallel-display"; |
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edid = [edid-data]; |
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interface-pix-fmt = "rgb24"; |
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port@0 { |
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reg = <0>; |
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display_in: endpoint { |
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remote-endpoint = <&ipu_di0_disp0>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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display_out: endpoint { |
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remote-endpoint = <&panel_in>; |
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}; |
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}; |
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}; |
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panel { |
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... |
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port { |
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panel_in: endpoint { |
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remote-endpoint = <&display_out>; |
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}; |
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}; |
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};
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