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57 lines
1.6 KiB
57 lines
1.6 KiB
Freescale imx21 Framebuffer |
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This framebuffer driver supports devices imx1, imx21, imx25, and imx27. |
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Required properties: |
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- compatible : "fsl,<chip>-fb", chip should be imx1 or imx21 |
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- reg : Should contain 1 register ranges(address and length) |
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- interrupts : One interrupt of the fb dev |
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Required nodes: |
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- display: Phandle to a display node as described in |
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Documentation/devicetree/bindings/display/panel/display-timing.txt |
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Additional, the display node has to define properties: |
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- bits-per-pixel: Bits per pixel |
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- fsl,pcr: LCDC PCR value |
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A display node may optionally define |
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- fsl,aus-mode: boolean to enable AUS mode (only for imx21) |
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Optional properties: |
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- lcd-supply: Regulator for LCD supply voltage. |
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- fsl,dmacr: DMA Control Register value. This is optional. By default, the |
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register is not modified as recommended by the datasheet. |
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- fsl,lpccr: Contrast Control Register value. This property provides the |
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default value for the contrast control register. |
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If that property is omitted, the register is zeroed. |
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- fsl,lscr1: LCDC Sharp Configuration Register value. |
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Example: |
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imxfb: fb@10021000 { |
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compatible = "fsl,imx21-fb"; |
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interrupts = <61>; |
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reg = <0x10021000 0x1000>; |
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display = <&display0>; |
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}; |
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... |
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display0: display0 { |
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model = "Primeview-PD050VL1"; |
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bits-per-pixel = <16>; |
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fsl,pcr = <0xf0c88080>; /* non-standard but required */ |
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display-timings { |
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native-mode = <&timing_disp0>; |
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timing_disp0: 640x480 { |
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hactive = <640>; |
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vactive = <480>; |
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hback-porch = <112>; |
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hfront-porch = <36>; |
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hsync-len = <32>; |
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vback-porch = <33>; |
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vfront-porch = <33>; |
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vsync-len = <2>; |
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clock-frequency = <25000000>; |
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}; |
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}; |
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};
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