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286 lines
7.5 KiB
286 lines
7.5 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Allwinner R40 TCON TOP Device Tree Bindings |
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maintainers: |
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- Chen-Yu Tsai <[email protected]> |
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- Maxime Ripard <[email protected]> |
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description: | |
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TCON TOPs main purpose is to configure whole display pipeline. It |
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determines relationships between mixers and TCONs, selects source |
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TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV |
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encoder clock source and contains additional TV TCON and DSI gates. |
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It allows display pipeline to be configured in very different ways: |
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/ LCD0/LVDS0 |
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/ [0] TCON-LCD0 |
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| \ MIPI DSI |
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mixer0 | |
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\ / [1] TCON-LCD1 - LCD1/LVDS1 |
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TCON-TOP |
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/ \ [2] TCON-TV0 [0] - TVE0/RGB |
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mixer1 | \ |
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| TCON-TOP - HDMI |
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| / |
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\ [3] TCON-TV1 [1] - TVE1/RGB |
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Note that both TCON TOP references same physical unit. Both mixers |
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can be connected to any TCON. Not all TCON TOP variants support all |
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features. |
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properties: |
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"#clock-cells": |
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const: 1 |
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compatible: |
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enum: |
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- allwinner,sun8i-r40-tcon-top |
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- allwinner,sun50i-h6-tcon-top |
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reg: |
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maxItems: 1 |
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clocks: |
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minItems: 2 |
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maxItems: 6 |
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items: |
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- description: The TCON TOP interface clock |
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- description: The TCON TOP TV0 clock |
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- description: The TCON TOP TVE0 clock |
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- description: The TCON TOP TV1 clock |
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- description: The TCON TOP TVE1 clock |
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- description: The TCON TOP MIPI DSI clock |
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clock-names: |
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minItems: 2 |
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maxItems: 6 |
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items: |
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- const: bus |
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- const: tcon-tv0 |
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- const: tve0 |
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- const: tcon-tv1 |
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- const: tve1 |
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- const: dsi |
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clock-output-names: |
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minItems: 1 |
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maxItems: 3 |
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description: > |
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The first item is the name of the clock created for the TV0 |
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channel, the second item is the name of the TCON TV1 channel |
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clock and the third one is the name of the DSI channel clock. |
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resets: |
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maxItems: 1 |
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ports: |
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$ref: /schemas/graph.yaml#/properties/ports |
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properties: |
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port@0: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Input endpoint for Mixer 0 mux. |
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port@1: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Output endpoint for Mixer 0 mux |
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port@2: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Input endpoint for Mixer 1 mux. |
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port@3: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Output endpoint for Mixer 1 mux |
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port@4: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Input endpoint for HDMI mux. |
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port@5: |
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$ref: /schemas/graph.yaml#/properties/port |
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description: | |
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Output endpoint for HDMI mux |
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required: |
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- port@0 |
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- port@1 |
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- port@4 |
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- port@5 |
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required: |
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- "#clock-cells" |
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- compatible |
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- reg |
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- clocks |
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- clock-names |
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- clock-output-names |
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- resets |
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- ports |
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additionalProperties: false |
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if: |
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properties: |
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compatible: |
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contains: |
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const: allwinner,sun50i-h6-tcon-top |
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then: |
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properties: |
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clocks: |
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maxItems: 2 |
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clock-output-names: |
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maxItems: 1 |
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else: |
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properties: |
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clocks: |
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minItems: 6 |
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clock-output-names: |
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minItems: 3 |
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ports: |
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required: |
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- port@2 |
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- port@3 |
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examples: |
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- | |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/clock/sun8i-r40-ccu.h> |
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#include <dt-bindings/reset/sun8i-r40-ccu.h> |
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tcon_top: tcon-top@1c70000 { |
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compatible = "allwinner,sun8i-r40-tcon-top"; |
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reg = <0x01c70000 0x1000>; |
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clocks = <&ccu CLK_BUS_TCON_TOP>, |
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<&ccu CLK_TCON_TV0>, |
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<&ccu CLK_TVE0>, |
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<&ccu CLK_TCON_TV1>, |
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<&ccu CLK_TVE1>, |
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<&ccu CLK_DSI_DPHY>; |
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clock-names = "bus", |
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"tcon-tv0", |
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"tve0", |
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"tcon-tv1", |
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"tve1", |
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"dsi"; |
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clock-output-names = "tcon-top-tv0", |
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"tcon-top-tv1", |
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"tcon-top-dsi"; |
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resets = <&ccu RST_BUS_TCON_TOP>; |
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#clock-cells = <1>; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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tcon_top_mixer0_in: port@0 { |
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reg = <0>; |
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tcon_top_mixer0_in_mixer0: endpoint { |
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remote-endpoint = <&mixer0_out_tcon_top>; |
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}; |
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}; |
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tcon_top_mixer0_out: port@1 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <1>; |
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tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { |
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reg = <0>; |
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}; |
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tcon_top_mixer0_out_tcon_lcd1: endpoint@1 { |
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reg = <1>; |
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}; |
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tcon_top_mixer0_out_tcon_tv0: endpoint@2 { |
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reg = <2>; |
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remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; |
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}; |
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tcon_top_mixer0_out_tcon_tv1: endpoint@3 { |
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reg = <3>; |
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remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>; |
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}; |
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}; |
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tcon_top_mixer1_in: port@2 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <2>; |
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tcon_top_mixer1_in_mixer1: endpoint@1 { |
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reg = <1>; |
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remote-endpoint = <&mixer1_out_tcon_top>; |
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}; |
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}; |
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tcon_top_mixer1_out: port@3 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <3>; |
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tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { |
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reg = <0>; |
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}; |
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tcon_top_mixer1_out_tcon_lcd1: endpoint@1 { |
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reg = <1>; |
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}; |
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tcon_top_mixer1_out_tcon_tv0: endpoint@2 { |
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reg = <2>; |
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remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; |
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}; |
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tcon_top_mixer1_out_tcon_tv1: endpoint@3 { |
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reg = <3>; |
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remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>; |
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}; |
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}; |
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tcon_top_hdmi_in: port@4 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <4>; |
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tcon_top_hdmi_in_tcon_tv0: endpoint@0 { |
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reg = <0>; |
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remote-endpoint = <&tcon_tv0_out_tcon_top>; |
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}; |
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tcon_top_hdmi_in_tcon_tv1: endpoint@1 { |
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reg = <1>; |
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remote-endpoint = <&tcon_tv1_out_tcon_top>; |
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}; |
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}; |
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tcon_top_hdmi_out: port@5 { |
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reg = <5>; |
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tcon_top_hdmi_out_hdmi: endpoint { |
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remote-endpoint = <&hdmi_in_tcon_top>; |
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}; |
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}; |
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}; |
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}; |
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...
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