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63 lines
1.7 KiB
63 lines
1.7 KiB
Spreadtrum SC9860 Clock Binding |
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------------------------ |
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Required properties: |
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- compatible: should contain the following compatible strings: |
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- "sprd,sc9860-pmu-gate" |
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- "sprd,sc9860-pll" |
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- "sprd,sc9860-ap-clk" |
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- "sprd,sc9860-aon-prediv" |
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- "sprd,sc9860-apahb-gate" |
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- "sprd,sc9860-aon-gate" |
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- "sprd,sc9860-aonsecure-clk" |
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- "sprd,sc9860-agcp-gate" |
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- "sprd,sc9860-gpu-clk" |
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- "sprd,sc9860-vsp-clk" |
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- "sprd,sc9860-vsp-gate" |
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- "sprd,sc9860-cam-clk" |
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- "sprd,sc9860-cam-gate" |
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- "sprd,sc9860-disp-clk" |
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- "sprd,sc9860-disp-gate" |
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- "sprd,sc9860-apapb-gate" |
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- #clock-cells: must be 1 |
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- clocks : Should be the input parent clock(s) phandle for the clock, this |
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property here just simply shows which clock group the clocks' |
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parents are in, since each clk node would represent many clocks |
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which are defined in the driver. The detailed dependency |
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relationship (i.e. how many parents and which are the parents) |
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are implemented in driver code. |
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Optional properties: |
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- reg: Contain the registers base address and length. It must be configured |
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only if no 'sprd,syscon' under the node. |
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- sprd,syscon: phandle to the syscon which is in the same address area with |
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the clock, and so we can get regmap for the clocks from the |
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syscon device. |
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Example: |
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pmu_gate: pmu-gate { |
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compatible = "sprd,sc9860-pmu-gate"; |
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sprd,syscon = <&pmu_regs>; |
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clocks = <&ext_26m>; |
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#clock-cells = <1>; |
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}; |
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pll: pll { |
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compatible = "sprd,sc9860-pll"; |
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sprd,syscon = <&ana_regs>; |
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clocks = <&pmu_gate 0>; |
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#clock-cells = <1>; |
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}; |
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ap_clk: clock-controller@20000000 { |
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compatible = "sprd,sc9860-ap-clk"; |
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reg = <0 0x20000000 0 0x400>; |
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clocks = <&ext_26m>, <&pll 0>, |
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<&pmu_gate 0>; |
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#clock-cells = <1>; |
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};
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