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82 lines
1.8 KiB
82 lines
1.8 KiB
# SPDX-License-Identifier: GPL-2.0-only |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Qualcomm Graphics Clock & Reset Controller Binding |
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maintainers: |
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- Taniya Das <[email protected]> |
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description: | |
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Qualcomm graphics clock control module which supports the clocks, resets and |
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power domains on SDM845/SC7180/SM8150/SM8250. |
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See also: |
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dt-bindings/clock/qcom,gpucc-sdm845.h |
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dt-bindings/clock/qcom,gpucc-sc7180.h |
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dt-bindings/clock/qcom,gpucc-sm8150.h |
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dt-bindings/clock/qcom,gpucc-sm8250.h |
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properties: |
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compatible: |
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enum: |
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- qcom,sdm845-gpucc |
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- qcom,sc7180-gpucc |
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- qcom,sm8150-gpucc |
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- qcom,sm8250-gpucc |
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clocks: |
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items: |
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- description: Board XO source |
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- description: GPLL0 main branch source |
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- description: GPLL0 div branch source |
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clock-names: |
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items: |
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- const: bi_tcxo |
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- const: gcc_gpu_gpll0_clk_src |
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- const: gcc_gpu_gpll0_div_clk_src |
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'#clock-cells': |
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const: 1 |
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'#reset-cells': |
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const: 1 |
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'#power-domain-cells': |
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const: 1 |
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reg: |
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maxItems: 1 |
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required: |
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- compatible |
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- reg |
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- clocks |
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- clock-names |
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- '#clock-cells' |
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- '#reset-cells' |
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- '#power-domain-cells' |
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additionalProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/qcom,gcc-sdm845.h> |
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#include <dt-bindings/clock/qcom,rpmh.h> |
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clock-controller@5090000 { |
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compatible = "qcom,sdm845-gpucc"; |
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reg = <0x05090000 0x9000>; |
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clocks = <&rpmhcc RPMH_CXO_CLK>, |
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<&gcc GCC_GPU_GPLL0_CLK_SRC>, |
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; |
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clock-names = "bi_tcxo", |
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"gcc_gpu_gpll0_clk_src", |
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"gcc_gpu_gpll0_div_clk_src"; |
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#clock-cells = <1>; |
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#reset-cells = <1>; |
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#power-domain-cells = <1>; |
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}; |
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...
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