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100 lines
2.8 KiB
100 lines
2.8 KiB
* Nuvoton NPCM7XX Clock Controller |
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Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which |
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generates and supplies clocks to all modules within the BMC. |
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External clocks: |
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There are six fixed clocks that are generated outside the BMC. All clocks are of |
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a known fixed value that cannot be changed. clk_refclk, clk_mcbypck and |
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clk_sysbypck are inputs to the clock controller. |
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clk_rg1refck, clk_rg2refck and clk_xin are external clocks suppling the |
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network. They are set on the device tree, but not used by the clock module. The |
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network devices use them directly. |
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Example can be found below. |
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All available clocks are defined as preprocessor macros in: |
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dt-bindings/clock/nuvoton,npcm7xx-clock.h |
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and can be reused as DT sources. |
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Required Properties of clock controller: |
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- compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton |
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Poleg BMC NPCM750 |
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- reg: physical base address of the clock controller and length of |
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memory mapped region. |
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- #clock-cells: should be 1. |
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Example: Clock controller node: |
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clk: clock-controller@f0801000 { |
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compatible = "nuvoton,npcm750-clk"; |
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#clock-cells = <1>; |
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reg = <0xf0801000 0x1000>; |
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clock-names = "refclk", "sysbypck", "mcbypck"; |
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clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>; |
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}; |
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Example: Required external clocks for network: |
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/* external reference clock */ |
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clk_refclk: clk-refclk { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <25000000>; |
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clock-output-names = "refclk"; |
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}; |
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/* external reference clock for cpu. float in normal operation */ |
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clk_sysbypck: clk-sysbypck { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <800000000>; |
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clock-output-names = "sysbypck"; |
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}; |
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/* external reference clock for MC. float in normal operation */ |
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clk_mcbypck: clk-mcbypck { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <800000000>; |
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clock-output-names = "mcbypck"; |
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}; |
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/* external clock signal rg1refck, supplied by the phy */ |
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clk_rg1refck: clk-rg1refck { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <125000000>; |
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clock-output-names = "clk_rg1refck"; |
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}; |
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/* external clock signal rg2refck, supplied by the phy */ |
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clk_rg2refck: clk-rg2refck { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <125000000>; |
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clock-output-names = "clk_rg2refck"; |
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}; |
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clk_xin: clk-xin { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <50000000>; |
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clock-output-names = "clk_xin"; |
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}; |
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Example: GMAC controller node that consumes two clocks: a generated clk by the |
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clock controller and a fixed clock from DT (clk_rg1refck). |
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ethernet0: ethernet@f0802000 { |
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compatible = "snps,dwmac"; |
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reg = <0xf0802000 0x2000>; |
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interrupts = <0 14 4>; |
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interrupt-names = "macirq"; |
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clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>; |
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clock-names = "stmmaceth", "clk_gmac"; |
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};
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