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125 lines
3.1 KiB
125 lines
3.1 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: NXP i.MX8M Family Clock Control Module Binding |
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maintainers: |
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- Anson Huang <[email protected]> |
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description: | |
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NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock |
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controller, which generates and supplies to all modules. |
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properties: |
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compatible: |
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enum: |
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- fsl,imx8mm-ccm |
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- fsl,imx8mn-ccm |
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- fsl,imx8mp-ccm |
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- fsl,imx8mq-ccm |
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reg: |
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maxItems: 1 |
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clocks: |
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minItems: 6 |
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maxItems: 7 |
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clock-names: |
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minItems: 6 |
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maxItems: 7 |
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'#clock-cells': |
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const: 1 |
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description: |
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The clock consumer should specify the desired clock by having the clock |
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ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h |
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for the full list of i.MX8M clock IDs. |
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required: |
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- compatible |
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- reg |
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- clocks |
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- clock-names |
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- '#clock-cells' |
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allOf: |
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- if: |
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properties: |
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compatible: |
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contains: |
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const: fsl,imx8mq-ccm |
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then: |
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properties: |
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clocks: |
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minItems: 7 |
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maxItems: 7 |
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items: |
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- description: 32k osc |
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- description: 25m osc |
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- description: 27m osc |
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- description: ext1 clock input |
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- description: ext2 clock input |
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- description: ext3 clock input |
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- description: ext4 clock input |
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clock-names: |
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minItems: 7 |
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maxItems: 7 |
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items: |
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- const: ckil |
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- const: osc_25m |
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- const: osc_27m |
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- const: clk_ext1 |
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- const: clk_ext2 |
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- const: clk_ext3 |
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- const: clk_ext4 |
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else: |
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properties: |
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clocks: |
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items: |
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- description: 32k osc |
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- description: 24m osc |
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- description: ext1 clock input |
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- description: ext2 clock input |
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- description: ext3 clock input |
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- description: ext4 clock input |
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clock-names: |
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items: |
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- const: osc_32k |
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- const: osc_24m |
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- const: clk_ext1 |
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- const: clk_ext2 |
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- const: clk_ext3 |
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- const: clk_ext4 |
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additionalProperties: false |
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examples: |
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# Clock Control Module node: |
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- | |
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clock-controller@30380000 { |
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compatible = "fsl,imx8mm-ccm"; |
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reg = <0x30380000 0x10000>; |
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#clock-cells = <1>; |
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clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, |
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<&clk_ext3>, <&clk_ext4>; |
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clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", |
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"clk_ext3", "clk_ext4"; |
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}; |
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- | |
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clock-controller@30390000 { |
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compatible = "fsl,imx8mq-ccm"; |
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reg = <0x30380000 0x10000>; |
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#clock-cells = <1>; |
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clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>, |
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<&clk_ext2>, <&clk_ext3>, <&clk_ext4>; |
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clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", |
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"clk_ext2", "clk_ext3", "clk_ext4"; |
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}; |
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...
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