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139 lines
2.9 KiB
139 lines
2.9 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/clock/imx35-clock.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Clock bindings for Freescale i.MX35 |
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maintainers: |
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- Steffen Trumtrar <[email protected]> |
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description: | |
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The clock consumer should specify the desired clock by having the clock |
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ID in its "clocks" phandle cell. The following is a full list of i.MX35 |
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clocks and IDs. |
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Clock ID |
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--------------------------- |
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ckih 0 |
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mpll 1 |
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ppll 2 |
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mpll_075 3 |
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arm 4 |
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hsp 5 |
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hsp_div 6 |
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hsp_sel 7 |
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ahb 8 |
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ipg 9 |
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arm_per_div 10 |
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ahb_per_div 11 |
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ipg_per 12 |
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uart_sel 13 |
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uart_div 14 |
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esdhc_sel 15 |
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esdhc1_div 16 |
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esdhc2_div 17 |
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esdhc3_div 18 |
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spdif_sel 19 |
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spdif_div_pre 20 |
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spdif_div_post 21 |
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ssi_sel 22 |
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ssi1_div_pre 23 |
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ssi1_div_post 24 |
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ssi2_div_pre 25 |
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ssi2_div_post 26 |
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usb_sel 27 |
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usb_div 28 |
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nfc_div 29 |
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asrc_gate 30 |
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pata_gate 31 |
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audmux_gate 32 |
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can1_gate 33 |
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can2_gate 34 |
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cspi1_gate 35 |
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cspi2_gate 36 |
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ect_gate 37 |
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edio_gate 38 |
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emi_gate 39 |
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epit1_gate 40 |
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epit2_gate 41 |
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esai_gate 42 |
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esdhc1_gate 43 |
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esdhc2_gate 44 |
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esdhc3_gate 45 |
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fec_gate 46 |
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gpio1_gate 47 |
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gpio2_gate 48 |
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gpio3_gate 49 |
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gpt_gate 50 |
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i2c1_gate 51 |
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i2c2_gate 52 |
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i2c3_gate 53 |
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iomuxc_gate 54 |
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ipu_gate 55 |
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kpp_gate 56 |
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mlb_gate 57 |
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mshc_gate 58 |
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owire_gate 59 |
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pwm_gate 60 |
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rngc_gate 61 |
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rtc_gate 62 |
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rtic_gate 63 |
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scc_gate 64 |
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sdma_gate 65 |
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spba_gate 66 |
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spdif_gate 67 |
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ssi1_gate 68 |
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ssi2_gate 69 |
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uart1_gate 70 |
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uart2_gate 71 |
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uart3_gate 72 |
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usbotg_gate 73 |
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wdog_gate 74 |
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max_gate 75 |
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admux_gate 76 |
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csi_gate 77 |
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csi_div 78 |
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csi_sel 79 |
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iim_gate 80 |
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gpu2d_gate 81 |
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ckli_gate 82 |
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properties: |
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compatible: |
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const: fsl,imx35-ccm |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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'#clock-cells': |
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const: 1 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- '#clock-cells' |
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additionalProperties: false |
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examples: |
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- | |
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clock-controller@53f80000 { |
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compatible = "fsl,imx35-ccm"; |
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reg = <0x53f80000 0x4000>; |
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interrupts = <31>; |
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#clock-cells = <1>; |
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}; |
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mmc@53fb4000 { |
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compatible = "fsl,imx35-esdhc"; |
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reg = <0x53fb4000 0x4000>; |
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interrupts = <7>; |
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clocks = <&clks 9>, <&clks 8>, <&clks 43>; |
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clock-names = "ipg", "ahb", "per"; |
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};
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