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186 lines
3.9 KiB
186 lines
3.9 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/clock/imx25-clock.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Clock bindings for Freescale i.MX25 |
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maintainers: |
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- Sascha Hauer <[email protected]> |
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description: | |
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The clock consumer should specify the desired clock by having the clock |
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ID in its "clocks" phandle cell. The following is a full list of i.MX25 |
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clocks and IDs. |
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Clock ID |
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-------------------------- |
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dummy 0 |
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osc 1 |
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mpll 2 |
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upll 3 |
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mpll_cpu_3_4 4 |
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cpu_sel 5 |
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cpu 6 |
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ahb 7 |
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usb_div 8 |
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ipg 9 |
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per0_sel 10 |
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per1_sel 11 |
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per2_sel 12 |
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per3_sel 13 |
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per4_sel 14 |
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per5_sel 15 |
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per6_sel 16 |
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per7_sel 17 |
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per8_sel 18 |
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per9_sel 19 |
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per10_sel 20 |
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per11_sel 21 |
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per12_sel 22 |
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per13_sel 23 |
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per14_sel 24 |
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per15_sel 25 |
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per0 26 |
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per1 27 |
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per2 28 |
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per3 29 |
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per4 30 |
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per5 31 |
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per6 32 |
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per7 33 |
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per8 34 |
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per9 35 |
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per10 36 |
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per11 37 |
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per12 38 |
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per13 39 |
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per14 40 |
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per15 41 |
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csi_ipg_per 42 |
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epit_ipg_per 43 |
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esai_ipg_per 44 |
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esdhc1_ipg_per 45 |
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esdhc2_ipg_per 46 |
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gpt_ipg_per 47 |
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i2c_ipg_per 48 |
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lcdc_ipg_per 49 |
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nfc_ipg_per 50 |
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owire_ipg_per 51 |
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pwm_ipg_per 52 |
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sim1_ipg_per 53 |
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sim2_ipg_per 54 |
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ssi1_ipg_per 55 |
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ssi2_ipg_per 56 |
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uart_ipg_per 57 |
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ata_ahb 58 |
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reserved 59 |
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csi_ahb 60 |
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emi_ahb 61 |
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esai_ahb 62 |
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esdhc1_ahb 63 |
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esdhc2_ahb 64 |
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fec_ahb 65 |
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lcdc_ahb 66 |
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rtic_ahb 67 |
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sdma_ahb 68 |
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slcdc_ahb 69 |
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usbotg_ahb 70 |
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reserved 71 |
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reserved 72 |
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reserved 73 |
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reserved 74 |
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can1_ipg 75 |
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can2_ipg 76 |
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csi_ipg 77 |
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cspi1_ipg 78 |
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cspi2_ipg 79 |
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cspi3_ipg 80 |
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dryice_ipg 81 |
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ect_ipg 82 |
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epit1_ipg 83 |
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epit2_ipg 84 |
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reserved 85 |
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esdhc1_ipg 86 |
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esdhc2_ipg 87 |
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fec_ipg 88 |
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reserved 89 |
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reserved 90 |
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reserved 91 |
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gpt1_ipg 92 |
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gpt2_ipg 93 |
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gpt3_ipg 94 |
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gpt4_ipg 95 |
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reserved 96 |
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reserved 97 |
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reserved 98 |
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iim_ipg 99 |
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reserved 100 |
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reserved 101 |
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kpp_ipg 102 |
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lcdc_ipg 103 |
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reserved 104 |
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pwm1_ipg 105 |
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pwm2_ipg 106 |
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pwm3_ipg 107 |
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pwm4_ipg 108 |
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rngb_ipg 109 |
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reserved 110 |
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scc_ipg 111 |
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sdma_ipg 112 |
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sim1_ipg 113 |
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sim2_ipg 114 |
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slcdc_ipg 115 |
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spba_ipg 116 |
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ssi1_ipg 117 |
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ssi2_ipg 118 |
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tsc_ipg 119 |
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uart1_ipg 120 |
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uart2_ipg 121 |
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uart3_ipg 122 |
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uart4_ipg 123 |
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uart5_ipg 124 |
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reserved 125 |
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wdt_ipg 126 |
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cko_div 127 |
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cko_sel 128 |
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cko 129 |
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properties: |
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compatible: |
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const: fsl,imx25-ccm |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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'#clock-cells': |
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const: 1 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- '#clock-cells' |
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additionalProperties: false |
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examples: |
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- | |
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clock-controller@53f80000 { |
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compatible = "fsl,imx25-ccm"; |
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reg = <0x53f80000 0x4000>; |
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interrupts = <31>; |
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#clock-cells = <1>; |
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}; |
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serial@43f90000 { |
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compatible = "fsl,imx25-uart", "fsl,imx21-uart"; |
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reg = <0x43f90000 0x4000>; |
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interrupts = <45>; |
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clocks = <&clks 79>, <&clks 50>; |
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clock-names = "ipg", "per"; |
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};
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