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80 lines
1.7 KiB
80 lines
1.7 KiB
# SPDX-License-Identifier: GPL-2.0 |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Allwinner A10 Module 0 Clock Device Tree Bindings |
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maintainers: |
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- Chen-Yu Tsai <[email protected]> |
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- Maxime Ripard <[email protected]> |
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deprecated: true |
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select: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- allwinner,sun4i-a10-mod0-clk |
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- allwinner,sun9i-a80-mod0-clk |
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# The PRCM on the A31 and A23 will have the reg property missing, |
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# since it's set at the upper level node, and will be validated by |
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# PRCM's schema. Make sure we only validate standalone nodes. |
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required: |
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- compatible |
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- reg |
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properties: |
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"#clock-cells": |
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const: 0 |
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compatible: |
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enum: |
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- allwinner,sun4i-a10-mod0-clk |
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- allwinner,sun9i-a80-mod0-clk |
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reg: |
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maxItems: 1 |
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clocks: |
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# On the A80, the PRCM mod0 clocks have 2 parents. |
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minItems: 2 |
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maxItems: 3 |
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description: > |
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The parent order must match the hardware programming order. |
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clock-output-names: |
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maxItems: 1 |
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required: |
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- "#clock-cells" |
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- compatible |
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- reg |
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- clocks |
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- clock-output-names |
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additionalProperties: false |
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examples: |
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- | |
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clk@1c20080 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun4i-a10-mod0-clk"; |
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reg = <0x01c20080 0x4>; |
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clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; |
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clock-output-names = "nand"; |
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}; |
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- | |
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clk@8001454 { |
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#clock-cells = <0>; |
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compatible = "allwinner,sun4i-a10-mod0-clk"; |
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reg = <0x08001454 0x4>; |
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clocks = <&osc32k>, <&osc24M>; |
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clock-output-names = "r_ir"; |
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}; |
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...
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