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93 lines
2.5 KiB
93 lines
2.5 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/ata/sata_highbank.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Calxeda AHCI SATA Controller |
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description: | |
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The Calxeda SATA controller mostly conforms to the AHCI interface |
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with some special extensions to add functionality, to map GPIOs for |
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activity LEDs and for mapping the ComboPHYs. |
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maintainers: |
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- Andre Przywara <[email protected]> |
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properties: |
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compatible: |
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const: calxeda,hb-ahci |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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dma-coherent: true |
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calxeda,pre-clocks: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: | |
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Indicates the number of additional clock cycles to transmit before |
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sending an SGPIO pattern. |
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calxeda,post-clocks: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: | |
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Indicates the number of additional clock cycles to transmit after |
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sending an SGPIO pattern. |
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calxeda,led-order: |
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description: Maps port numbers to offsets within the SGPIO bitstream. |
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$ref: /schemas/types.yaml#/definitions/uint32-array |
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minItems: 1 |
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maxItems: 8 |
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calxeda,port-phys: |
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description: | |
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phandle-combophy and lane assignment, which maps each SATA port to a |
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combophy and a lane within that combophy |
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$ref: /schemas/types.yaml#/definitions/phandle-array |
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minItems: 1 |
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maxItems: 8 |
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calxeda,tx-atten: |
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description: | |
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Contains TX attenuation override codes, one per port. |
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The upper 24 bits of each entry are always 0 and thus ignored. |
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$ref: /schemas/types.yaml#/definitions/uint32-array |
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minItems: 1 |
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maxItems: 8 |
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calxeda,sgpio-gpio: |
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maxItems: 3 |
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description: | |
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phandle-gpio bank, bit offset, and default on or off, which indicates |
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that the driver supports SGPIO indicator lights using the indicated |
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GPIOs. |
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required: |
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- compatible |
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- reg |
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- interrupts |
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additionalProperties: false |
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examples: |
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- | |
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sata@ffe08000 { |
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compatible = "calxeda,hb-ahci"; |
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reg = <0xffe08000 0x1000>; |
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interrupts = <115>; |
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dma-coherent; |
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calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>, |
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<&combophy0 2>, <&combophy0 3>; |
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calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>; |
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calxeda,led-order = <4 0 1 2 3>; |
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calxeda,tx-atten = <0xff 22 0xff 0xff 23>; |
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calxeda,pre-clocks = <10>; |
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calxeda,post-clocks = <0>; |
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}; |
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...
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