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21 lines
768 B
21 lines
768 B
Binding for Freescale QorIQ AHCI SATA Controller |
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Required properties: |
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- reg: Physical base address and size of the controller's register area. |
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- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where |
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chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc. |
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- clocks: Input clock specifier. Refer to common clock bindings. |
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- interrupts: Interrupt specifier. Refer to interrupt binding. |
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Optional properties: |
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- dma-coherent: Enable AHCI coherent DMA operation. |
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- reg-names: register area names when there are more than 1 register area. |
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Examples: |
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sata@3200000 { |
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compatible = "fsl,ls1021a-ahci"; |
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reg = <0x0 0x3200000 0x0 0x10000>; |
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&platform_clk 1>; |
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dma-coherent; |
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};
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