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49 lines
1.4 KiB
49 lines
1.4 KiB
Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) |
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The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. |
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There is one ACC register region per CPU within the KPSS remapped region as |
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well as an alias register region that remaps accesses to the ACC associated |
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with the CPU accessing the region. |
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PROPERTIES |
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- compatible: |
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Usage: required |
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Value type: <string> |
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Definition: should be one of: |
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"qcom,kpss-acc-v1" |
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"qcom,kpss-acc-v2" |
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- reg: |
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Usage: required |
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Value type: <prop-encoded-array> |
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Definition: the first element specifies the base address and size of |
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the register region. An optional second element specifies |
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the base address and size of the alias register region. |
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- clocks: |
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Usage: required |
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Value type: <prop-encoded-array> |
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Definition: reference to the pll parents. |
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- clock-names: |
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Usage: required |
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Value type: <stringlist> |
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Definition: must be "pll8_vote", "pxo". |
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- clock-output-names: |
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Usage: optional |
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Value type: <string> |
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Definition: Name of the output clock. Typically acpuX_aux where X is a |
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CPU number starting at 0. |
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Example: |
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clock-controller@2088000 { |
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compatible = "qcom,kpss-acc-v2"; |
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reg = <0x02088000 0x1000>, |
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<0x02008000 0x1000>; |
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clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; |
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clock-names = "pll8_vote", "pxo"; |
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clock-output-names = "acpu0_aux"; |
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};
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