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34 lines
1.0 KiB
34 lines
1.0 KiB
Mediatek apmixedsys controller |
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The Mediatek apmixedsys controller provides the PLLs to the system. |
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Required Properties: |
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- compatible: Should be one of: |
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- "mediatek,mt2701-apmixedsys" |
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- "mediatek,mt2712-apmixedsys", "syscon" |
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- "mediatek,mt6765-apmixedsys", "syscon" |
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- "mediatek,mt6779-apmixedsys", "syscon" |
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- "mediatek,mt6797-apmixedsys" |
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- "mediatek,mt7622-apmixedsys" |
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- "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" |
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- "mediatek,mt7629-apmixedsys" |
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- "mediatek,mt8135-apmixedsys" |
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- "mediatek,mt8167-apmixedsys", "syscon" |
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- "mediatek,mt8173-apmixedsys" |
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- "mediatek,mt8183-apmixedsys", "syscon" |
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- "mediatek,mt8516-apmixedsys" |
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- #clock-cells: Must be 1 |
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The apmixedsys controller uses the common clk binding from |
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Documentation/devicetree/bindings/clock/clock-bindings.txt |
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The available clocks are defined in dt-bindings/clock/mt*-clk.h. |
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Example: |
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apmixedsys: clock-controller@10209000 { |
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compatible = "mediatek,mt8173-apmixedsys"; |
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reg = <0 0x10209000 0 0x1000>; |
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#clock-cells = <1>; |
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};
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