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191 lines
5.4 KiB
191 lines
5.4 KiB
/* |
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* Copyright (C) 2017 Icenowy Zheng <[email protected]> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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*/ |
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#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ |
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#define _DT_BINDINGS_CLK_SUN8I_R40_H_ |
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#define CLK_PLL_VIDEO0 7 |
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#define CLK_PLL_VIDEO1 16 |
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#define CLK_CPU 24 |
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#define CLK_BUS_MIPI_DSI 29 |
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#define CLK_BUS_CE 30 |
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#define CLK_BUS_DMA 31 |
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#define CLK_BUS_MMC0 32 |
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#define CLK_BUS_MMC1 33 |
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#define CLK_BUS_MMC2 34 |
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#define CLK_BUS_MMC3 35 |
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#define CLK_BUS_NAND 36 |
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#define CLK_BUS_DRAM 37 |
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#define CLK_BUS_EMAC 38 |
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#define CLK_BUS_TS 39 |
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#define CLK_BUS_HSTIMER 40 |
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#define CLK_BUS_SPI0 41 |
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#define CLK_BUS_SPI1 42 |
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#define CLK_BUS_SPI2 43 |
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#define CLK_BUS_SPI3 44 |
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#define CLK_BUS_SATA 45 |
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#define CLK_BUS_OTG 46 |
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#define CLK_BUS_EHCI0 47 |
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#define CLK_BUS_EHCI1 48 |
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#define CLK_BUS_EHCI2 49 |
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#define CLK_BUS_OHCI0 50 |
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#define CLK_BUS_OHCI1 51 |
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#define CLK_BUS_OHCI2 52 |
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#define CLK_BUS_VE 53 |
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#define CLK_BUS_MP 54 |
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#define CLK_BUS_DEINTERLACE 55 |
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#define CLK_BUS_CSI0 56 |
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#define CLK_BUS_CSI1 57 |
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#define CLK_BUS_HDMI1 58 |
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#define CLK_BUS_HDMI0 59 |
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#define CLK_BUS_DE 60 |
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#define CLK_BUS_TVE0 61 |
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#define CLK_BUS_TVE1 62 |
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#define CLK_BUS_TVE_TOP 63 |
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#define CLK_BUS_GMAC 64 |
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#define CLK_BUS_GPU 65 |
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#define CLK_BUS_TVD0 66 |
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#define CLK_BUS_TVD1 67 |
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#define CLK_BUS_TVD2 68 |
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#define CLK_BUS_TVD3 69 |
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#define CLK_BUS_TVD_TOP 70 |
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#define CLK_BUS_TCON_LCD0 71 |
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#define CLK_BUS_TCON_LCD1 72 |
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#define CLK_BUS_TCON_TV0 73 |
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#define CLK_BUS_TCON_TV1 74 |
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#define CLK_BUS_TCON_TOP 75 |
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#define CLK_BUS_CODEC 76 |
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#define CLK_BUS_SPDIF 77 |
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#define CLK_BUS_AC97 78 |
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#define CLK_BUS_PIO 79 |
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#define CLK_BUS_IR0 80 |
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#define CLK_BUS_IR1 81 |
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#define CLK_BUS_THS 82 |
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#define CLK_BUS_KEYPAD 83 |
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#define CLK_BUS_I2S0 84 |
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#define CLK_BUS_I2S1 85 |
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#define CLK_BUS_I2S2 86 |
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#define CLK_BUS_I2C0 87 |
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#define CLK_BUS_I2C1 88 |
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#define CLK_BUS_I2C2 89 |
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#define CLK_BUS_I2C3 90 |
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#define CLK_BUS_CAN 91 |
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#define CLK_BUS_SCR 92 |
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#define CLK_BUS_PS20 93 |
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#define CLK_BUS_PS21 94 |
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#define CLK_BUS_I2C4 95 |
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#define CLK_BUS_UART0 96 |
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#define CLK_BUS_UART1 97 |
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#define CLK_BUS_UART2 98 |
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#define CLK_BUS_UART3 99 |
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#define CLK_BUS_UART4 100 |
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#define CLK_BUS_UART5 101 |
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#define CLK_BUS_UART6 102 |
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#define CLK_BUS_UART7 103 |
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#define CLK_BUS_DBG 104 |
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#define CLK_THS 105 |
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#define CLK_NAND 106 |
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#define CLK_MMC0 107 |
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#define CLK_MMC1 108 |
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#define CLK_MMC2 109 |
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#define CLK_MMC3 110 |
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#define CLK_TS 111 |
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#define CLK_CE 112 |
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#define CLK_SPI0 113 |
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#define CLK_SPI1 114 |
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#define CLK_SPI2 115 |
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#define CLK_SPI3 116 |
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#define CLK_I2S0 117 |
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#define CLK_I2S1 118 |
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#define CLK_I2S2 119 |
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#define CLK_AC97 120 |
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#define CLK_SPDIF 121 |
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#define CLK_KEYPAD 122 |
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#define CLK_SATA 123 |
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#define CLK_USB_PHY0 124 |
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#define CLK_USB_PHY1 125 |
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#define CLK_USB_PHY2 126 |
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#define CLK_USB_OHCI0 127 |
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#define CLK_USB_OHCI1 128 |
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#define CLK_USB_OHCI2 129 |
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#define CLK_IR0 130 |
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#define CLK_IR1 131 |
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#define CLK_DRAM_VE 133 |
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#define CLK_DRAM_CSI0 134 |
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#define CLK_DRAM_CSI1 135 |
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#define CLK_DRAM_TS 136 |
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#define CLK_DRAM_TVD 137 |
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#define CLK_DRAM_MP 138 |
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#define CLK_DRAM_DEINTERLACE 139 |
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#define CLK_DE 140 |
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#define CLK_MP 141 |
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#define CLK_TCON_LCD0 142 |
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#define CLK_TCON_LCD1 143 |
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#define CLK_TCON_TV0 144 |
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#define CLK_TCON_TV1 145 |
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#define CLK_DEINTERLACE 146 |
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#define CLK_CSI1_MCLK 147 |
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#define CLK_CSI_SCLK 148 |
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#define CLK_CSI0_MCLK 149 |
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#define CLK_VE 150 |
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#define CLK_CODEC 151 |
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#define CLK_AVS 152 |
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#define CLK_HDMI 153 |
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#define CLK_HDMI_SLOW 154 |
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#define CLK_MBUS 155 |
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#define CLK_DSI_DPHY 156 |
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#define CLK_TVE0 157 |
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#define CLK_TVE1 158 |
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#define CLK_TVD0 159 |
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#define CLK_TVD1 160 |
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#define CLK_TVD2 161 |
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#define CLK_TVD3 162 |
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#define CLK_GPU 163 |
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#define CLK_OUTA 164 |
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#define CLK_OUTB 165 |
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#endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */
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