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90 lines
2.3 KiB
90 lines
2.3 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Copyright (C) 2017, Intel Corporation |
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*/ |
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#ifndef __STRATIX10_CLK_H |
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#define __STRATIX10_CLK_H |
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struct stratix10_clock_data { |
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struct clk_hw_onecell_data clk_data; |
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void __iomem *base; |
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}; |
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struct stratix10_pll_clock { |
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unsigned int id; |
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const char *name; |
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const struct clk_parent_data *parent_data; |
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u8 num_parents; |
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unsigned long flags; |
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unsigned long offset; |
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}; |
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struct stratix10_perip_c_clock { |
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unsigned int id; |
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const char *name; |
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const char *parent_name; |
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const struct clk_parent_data *parent_data; |
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u8 num_parents; |
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unsigned long flags; |
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unsigned long offset; |
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}; |
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struct n5x_perip_c_clock { |
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unsigned int id; |
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const char *name; |
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const char *parent_name; |
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const char *const *parent_names; |
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u8 num_parents; |
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unsigned long flags; |
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unsigned long offset; |
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unsigned long shift; |
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}; |
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struct stratix10_perip_cnt_clock { |
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unsigned int id; |
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const char *name; |
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const char *parent_name; |
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const struct clk_parent_data *parent_data; |
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u8 num_parents; |
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unsigned long flags; |
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unsigned long offset; |
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u8 fixed_divider; |
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unsigned long bypass_reg; |
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unsigned long bypass_shift; |
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}; |
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struct stratix10_gate_clock { |
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unsigned int id; |
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const char *name; |
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const char *parent_name; |
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const struct clk_parent_data *parent_data; |
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u8 num_parents; |
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unsigned long flags; |
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unsigned long gate_reg; |
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u8 gate_idx; |
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unsigned long div_reg; |
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u8 div_offset; |
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u8 div_width; |
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unsigned long bypass_reg; |
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u8 bypass_shift; |
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u8 fixed_div; |
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}; |
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struct clk_hw *s10_register_pll(const struct stratix10_pll_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *agilex_register_pll(const struct stratix10_pll_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *n5x_register_pll(const struct stratix10_pll_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *s10_register_periph(const struct stratix10_perip_c_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *n5x_register_periph(const struct n5x_perip_c_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *s10_register_cnt_periph(const struct stratix10_perip_cnt_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *s10_register_gate(const struct stratix10_gate_clock *clks, |
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void __iomem *reg); |
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struct clk_hw *agilex_register_gate(const struct stratix10_gate_clock *clks, |
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void __iomem *reg); |
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#endif /* __STRATIX10_CLK_H */
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