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20 lines
761 B
20 lines
761 B
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Copyright 2011-2012 Calxeda, Inc. |
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* Copyright (C) 2012-2013 Altera Corporation <www.altera.com> |
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* |
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* Based from clk-highbank.c |
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*/ |
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#include <linux/of.h> |
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#include "clk.h" |
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CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init); |
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CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init); |
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CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init); |
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CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock", |
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socfpga_a10_pll_init); |
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CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk", |
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socfpga_a10_periph_init); |
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CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk", |
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socfpga_a10_gate_init);
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