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66 lines
1.5 KiB
66 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) ST-Ericsson SA 2012 |
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* |
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* Author: Ola Lilja <[email protected]>, |
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* Roger Nilsson <[email protected]> |
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* for ST-Ericsson. |
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*/ |
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#ifndef UX500_msp_dai_H |
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#define UX500_msp_dai_H |
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#include <linux/types.h> |
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#include <linux/spinlock.h> |
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#include "ux500_msp_i2s.h" |
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#define UX500_NBR_OF_DAI 4 |
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#define UX500_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | \ |
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SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) |
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#define UX500_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) |
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#define FRAME_PER_SINGLE_SLOT_8_KHZ 31 |
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#define FRAME_PER_SINGLE_SLOT_16_KHZ 124 |
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#define FRAME_PER_SINGLE_SLOT_44_1_KHZ 63 |
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#define FRAME_PER_SINGLE_SLOT_48_KHZ 49 |
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#define FRAME_PER_2_SLOTS 31 |
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#define FRAME_PER_8_SLOTS 138 |
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#define FRAME_PER_16_SLOTS 277 |
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#define UX500_MSP_INTERNAL_CLOCK_FREQ 40000000 |
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#define UX500_MSP1_INTERNAL_CLOCK_FREQ UX500_MSP_INTERNAL_CLOCK_FREQ |
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#define UX500_MSP_MIN_CHANNELS 1 |
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#define UX500_MSP_MAX_CHANNELS 8 |
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#define PLAYBACK_CONFIGURED 1 |
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#define CAPTURE_CONFIGURED 2 |
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enum ux500_msp_clock_id { |
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UX500_MSP_MASTER_CLOCK, |
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}; |
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struct ux500_msp_i2s_drvdata { |
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struct ux500_msp *msp; |
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struct regulator *reg_vape; |
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unsigned int fmt; |
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unsigned int tx_mask; |
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unsigned int rx_mask; |
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int slots; |
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int slot_width; |
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/* Clocks */ |
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unsigned int master_clk; |
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struct clk *clk; |
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struct clk *pclk; |
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/* Regulators */ |
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int vape_opp_constraint; |
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}; |
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int ux500_msp_dai_set_data_delay(struct snd_soc_dai *dai, int delay); |
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#endif
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