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255 lines
6.3 KiB
255 lines
6.3 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, [email protected]. |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <serial.h> |
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#include <watchdog.h> |
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#include <asm/cpm_8xx.h> |
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#include <linux/compiler.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */ |
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#define SMC_INDEX 0 |
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#define PROFF_SMC PROFF_SMC1 |
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#define CPM_CR_CH_SMC CPM_CR_CH_SMC1 |
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#define IOPINS 0xc0 |
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#elif defined(CONFIG_8xx_CONS_SMC2) /* Console on SMC2 */ |
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#define SMC_INDEX 1 |
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#define PROFF_SMC PROFF_SMC2 |
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#define CPM_CR_CH_SMC CPM_CR_CH_SMC2 |
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#define IOPINS 0xc00 |
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#endif /* CONFIG_8xx_CONS_SMCx */ |
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struct serialbuffer { |
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cbd_t rxbd; /* Rx BD */ |
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cbd_t txbd; /* Tx BD */ |
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uint rxindex; /* index for next character to read */ |
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uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */ |
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uchar txbuf; /* tx buffers */ |
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}; |
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static void serial_setdivisor(cpm8xx_t __iomem *cp) |
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{ |
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int divisor = (gd->cpu_clk + 8 * gd->baudrate) / 16 / gd->baudrate; |
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if (divisor / 16 > 0x1000) { |
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/* bad divisor, assume 50MHz clock and 9600 baud */ |
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divisor = (50 * 1000 * 1000 + 8 * 9600) / 16 / 9600; |
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} |
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divisor /= CONFIG_SYS_BRGCLK_PRESCALE; |
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if (divisor <= 0x1000) |
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out_be32(&cp->cp_brgc1, ((divisor - 1) << 1) | CPM_BRG_EN); |
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else |
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out_be32(&cp->cp_brgc1, ((divisor / 16 - 1) << 1) | CPM_BRG_EN | |
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CPM_BRG_DIV16); |
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} |
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/* |
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* Minimal serial functions needed to use one of the SMC ports |
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* as serial console interface. |
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*/ |
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static void smc_setbrg(void) |
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{ |
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immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
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cpm8xx_t __iomem *cp = &(im->im_cpm); |
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/* Set up the baud rate generator. |
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* See 8xx_io/commproc.c for details. |
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* |
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* Wire BRG1 to SMCx |
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*/ |
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out_be32(&cp->cp_simode, 0); |
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serial_setdivisor(cp); |
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} |
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static int smc_init(void) |
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{ |
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immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
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smc_t __iomem *sp; |
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smc_uart_t __iomem *up; |
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cpm8xx_t __iomem *cp = &(im->im_cpm); |
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struct serialbuffer __iomem *rtx; |
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/* initialize pointers to SMC */ |
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sp = cp->cp_smc + SMC_INDEX; |
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up = (smc_uart_t __iomem *)&cp->cp_dparam[PROFF_SMC]; |
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/* Disable relocation */ |
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out_be16(&up->smc_rpbase, 0); |
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/* Disable transmitter/receiver. */ |
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clrbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
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/* Enable SDMA. */ |
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out_be32(&im->im_siu_conf.sc_sdcr, 1); |
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/* clear error conditions */ |
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out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR); |
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/* clear SDMA interrupt mask */ |
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out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR); |
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/* Use Port B for SMCx instead of other functions. */ |
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setbits_be32(&cp->cp_pbpar, IOPINS); |
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clrbits_be32(&cp->cp_pbdir, IOPINS); |
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clrbits_be16(&cp->cp_pbodr, IOPINS); |
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/* Set the physical address of the host memory buffers in |
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* the buffer descriptors. |
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*/ |
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rtx = (struct serialbuffer __iomem *)&cp->cp_dpmem[CPM_SERIAL_BASE]; |
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/* Allocate space for two buffer descriptors in the DP ram. |
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* For now, this address seems OK, but it may have to |
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* change with newer versions of the firmware. |
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* damm: allocating space after the two buffers for rx/tx data |
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*/ |
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out_be32(&rtx->rxbd.cbd_bufaddr, (__force uint)&rtx->rxbuf); |
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out_be16(&rtx->rxbd.cbd_sc, 0); |
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out_be32(&rtx->txbd.cbd_bufaddr, (__force uint)&rtx->txbuf); |
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out_be16(&rtx->txbd.cbd_sc, 0); |
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/* Set up the uart parameters in the parameter ram. */ |
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out_be16(&up->smc_rbase, CPM_SERIAL_BASE); |
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out_be16(&up->smc_tbase, CPM_SERIAL_BASE + sizeof(cbd_t)); |
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out_8(&up->smc_rfcr, SMC_EB); |
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out_8(&up->smc_tfcr, SMC_EB); |
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/* Set UART mode, 8 bit, no parity, one stop. |
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* Enable receive and transmit. |
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*/ |
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out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART); |
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/* Mask all interrupts and remove anything pending. |
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*/ |
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out_8(&sp->smc_smcm, 0); |
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out_8(&sp->smc_smce, 0xff); |
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/* Set up the baud rate generator */ |
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smc_setbrg(); |
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/* Make the first buffer the only buffer. */ |
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setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP); |
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setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); |
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/* single/multi character receive. */ |
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out_be16(&up->smc_mrblr, CONFIG_SYS_SMC_RXBUFLEN); |
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out_be16(&up->smc_maxidl, CONFIG_SYS_MAXIDLE); |
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out_be32(&rtx->rxindex, 0); |
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/* Initialize Tx/Rx parameters. */ |
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while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */ |
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; |
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out_be16(&cp->cp_cpcr, |
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mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG); |
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while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG) /* wait if cp is busy */ |
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; |
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/* Enable transmitter/receiver. */ |
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setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
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return 0; |
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} |
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static void smc_putc(const char c) |
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{ |
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immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
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cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
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struct serialbuffer __iomem *rtx; |
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if (c == '\n') |
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smc_putc('\r'); |
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rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
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/* Wait for last character to go. */ |
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out_8(&rtx->txbuf, c); |
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out_be16(&rtx->txbd.cbd_datlen, 1); |
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setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY); |
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while (in_be16(&rtx->txbd.cbd_sc) & BD_SC_READY) |
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WATCHDOG_RESET(); |
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} |
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static void smc_puts(const char *s) |
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{ |
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while (*s) |
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smc_putc(*s++); |
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} |
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static int smc_getc(void) |
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{ |
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immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
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cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
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struct serialbuffer __iomem *rtx; |
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unsigned char c; |
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uint rxindex; |
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rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
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/* Wait for character to show up. */ |
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while (in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY) |
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WATCHDOG_RESET(); |
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/* the characters are read one by one, |
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* use the rxindex to know the next char to deliver |
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*/ |
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rxindex = in_be32(&rtx->rxindex); |
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c = in_8(rtx->rxbuf + rxindex); |
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rxindex++; |
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/* check if all char are readout, then make prepare for next receive */ |
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if (rxindex >= in_be16(&rtx->rxbd.cbd_datlen)) { |
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rxindex = 0; |
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setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY); |
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} |
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out_be32(&rtx->rxindex, rxindex); |
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return c; |
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} |
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static int smc_tstc(void) |
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{ |
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immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR; |
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cpm8xx_t __iomem *cpmp = &(im->im_cpm); |
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struct serialbuffer __iomem *rtx; |
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rtx = (struct serialbuffer __iomem *)&cpmp->cp_dpmem[CPM_SERIAL_BASE]; |
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return !(in_be16(&rtx->rxbd.cbd_sc) & BD_SC_EMPTY); |
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} |
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struct serial_device serial_smc_device = { |
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.name = "serial_smc", |
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.start = smc_init, |
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.stop = NULL, |
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.setbrg = smc_setbrg, |
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.getc = smc_getc, |
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.tstc = smc_tstc, |
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.putc = smc_putc, |
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.puts = smc_puts, |
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}; |
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__weak struct serial_device *default_serial_console(void) |
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{ |
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return &serial_smc_device; |
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} |
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void mpc8xx_serial_initialize(void) |
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{ |
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serial_register(&serial_smc_device); |
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}
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