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437 lines
11 KiB
437 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs |
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* |
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* Copyright (C) 2016 Intel Corporation |
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* Author: Andy Shevchenko <[email protected]> |
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*/ |
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#include <linux/bitops.h> |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <linux/rational.h> |
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#include <linux/dmaengine.h> |
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#include <linux/dma/dw.h> |
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#include "8250_dwlib.h" |
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#define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936 |
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#define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a |
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#define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c |
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#define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a |
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#define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c |
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#define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96 |
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#define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97 |
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#define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98 |
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#define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99 |
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#define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a |
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#define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b |
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#define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3 |
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#define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4 |
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/* Intel LPSS specific registers */ |
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#define BYT_PRV_CLK 0x800 |
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#define BYT_PRV_CLK_EN BIT(0) |
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#define BYT_PRV_CLK_M_VAL_SHIFT 1 |
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#define BYT_PRV_CLK_N_VAL_SHIFT 16 |
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#define BYT_PRV_CLK_UPDATE BIT(31) |
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#define BYT_TX_OVF_INT 0x820 |
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#define BYT_TX_OVF_INT_MASK BIT(1) |
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struct lpss8250; |
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struct lpss8250_board { |
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unsigned long freq; |
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unsigned int base_baud; |
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int (*setup)(struct lpss8250 *, struct uart_port *p); |
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void (*exit)(struct lpss8250 *); |
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}; |
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struct lpss8250 { |
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struct dw8250_port_data data; |
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struct lpss8250_board *board; |
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/* DMA parameters */ |
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struct dw_dma_chip dma_chip; |
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struct dw_dma_slave dma_param; |
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u8 dma_maxburst; |
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}; |
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static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data) |
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{ |
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return container_of(data, struct lpss8250, data); |
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} |
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static void byt_set_termios(struct uart_port *p, struct ktermios *termios, |
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const struct ktermios *old) |
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{ |
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unsigned int baud = tty_termios_baud_rate(termios); |
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struct lpss8250 *lpss = to_lpss8250(p->private_data); |
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unsigned long fref = lpss->board->freq, fuart = baud * 16; |
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unsigned long w = BIT(15) - 1; |
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unsigned long m, n; |
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u32 reg; |
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/* Gracefully handle the B0 case: fall back to B9600 */ |
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fuart = fuart ? fuart : 9600 * 16; |
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/* Get Fuart closer to Fref */ |
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fuart *= rounddown_pow_of_two(fref / fuart); |
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/* |
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* For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the |
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* dividers must be adjusted. |
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* |
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* uartclk = (m / n) * 100 MHz, where m <= n |
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*/ |
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rational_best_approximation(fuart, fref, w, w, &m, &n); |
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p->uartclk = fuart; |
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/* Reset the clock */ |
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reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT); |
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writel(reg, p->membase + BYT_PRV_CLK); |
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reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE; |
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writel(reg, p->membase + BYT_PRV_CLK); |
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dw8250_do_set_termios(p, termios, old); |
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} |
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static unsigned int byt_get_mctrl(struct uart_port *port) |
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{ |
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unsigned int ret = serial8250_do_get_mctrl(port); |
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/* Force DCD and DSR signals to permanently be reported as active */ |
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ret |= TIOCM_CAR | TIOCM_DSR; |
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return ret; |
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} |
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static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
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{ |
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struct dw_dma_slave *param = &lpss->dma_param; |
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struct pci_dev *pdev = to_pci_dev(port->dev); |
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struct pci_dev *dma_dev; |
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switch (pdev->device) { |
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case PCI_DEVICE_ID_INTEL_BYT_UART1: |
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case PCI_DEVICE_ID_INTEL_BSW_UART1: |
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case PCI_DEVICE_ID_INTEL_BDW_UART1: |
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param->src_id = 3; |
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param->dst_id = 2; |
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break; |
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case PCI_DEVICE_ID_INTEL_BYT_UART2: |
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case PCI_DEVICE_ID_INTEL_BSW_UART2: |
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case PCI_DEVICE_ID_INTEL_BDW_UART2: |
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param->src_id = 5; |
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param->dst_id = 4; |
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break; |
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default: |
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return -EINVAL; |
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} |
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dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0)); |
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param->dma_dev = &dma_dev->dev; |
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param->m_master = 0; |
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param->p_master = 1; |
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lpss->dma_maxburst = 16; |
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port->set_termios = byt_set_termios; |
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port->get_mctrl = byt_get_mctrl; |
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/* Disable TX counter interrupts */ |
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writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT); |
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return 0; |
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} |
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static void byt_serial_exit(struct lpss8250 *lpss) |
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{ |
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struct dw_dma_slave *param = &lpss->dma_param; |
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/* Paired with pci_get_slot() in the byt_serial_setup() above */ |
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put_device(param->dma_dev); |
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} |
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static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
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{ |
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struct uart_8250_dma *dma = &lpss->data.dma; |
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struct uart_8250_port *up = up_to_u8250p(port); |
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/* |
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* This simply makes the checks in the 8250_port to try the DMA |
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* channel request which in turn uses the magic of ACPI tables |
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* parsing (see drivers/dma/acpi-dma.c for the details) and |
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* matching with the registered General Purpose DMA controllers. |
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*/ |
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up->dma = dma; |
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lpss->dma_maxburst = 16; |
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port->set_termios = dw8250_do_set_termios; |
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return 0; |
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} |
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static void ehl_serial_exit(struct lpss8250 *lpss) |
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{ |
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struct uart_8250_port *up = serial8250_get_port(lpss->data.line); |
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up->dma = NULL; |
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} |
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#ifdef CONFIG_SERIAL_8250_DMA |
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static const struct dw_dma_platform_data qrk_serial_dma_pdata = { |
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.nr_channels = 2, |
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.chan_allocation_order = CHAN_ALLOCATION_ASCENDING, |
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.chan_priority = CHAN_PRIORITY_ASCENDING, |
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.block_size = 4095, |
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.nr_masters = 1, |
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.data_width = {4}, |
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.multi_block = {0}, |
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}; |
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static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) |
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{ |
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struct uart_8250_dma *dma = &lpss->data.dma; |
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struct dw_dma_chip *chip = &lpss->dma_chip; |
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struct dw_dma_slave *param = &lpss->dma_param; |
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struct pci_dev *pdev = to_pci_dev(port->dev); |
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int ret; |
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chip->pdata = &qrk_serial_dma_pdata; |
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chip->dev = &pdev->dev; |
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chip->id = pdev->devfn; |
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chip->irq = pci_irq_vector(pdev, 0); |
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chip->regs = pci_ioremap_bar(pdev, 1); |
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if (!chip->regs) |
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return; |
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/* Falling back to PIO mode if DMA probing fails */ |
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ret = dw_dma_probe(chip); |
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if (ret) |
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return; |
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pci_try_set_mwi(pdev); |
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/* Special DMA address for UART */ |
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dma->rx_dma_addr = 0xfffff000; |
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dma->tx_dma_addr = 0xfffff000; |
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param->dma_dev = &pdev->dev; |
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param->src_id = 0; |
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param->dst_id = 1; |
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param->hs_polarity = true; |
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lpss->dma_maxburst = 8; |
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} |
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static void qrk_serial_exit_dma(struct lpss8250 *lpss) |
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{ |
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struct dw_dma_chip *chip = &lpss->dma_chip; |
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struct dw_dma_slave *param = &lpss->dma_param; |
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if (!param->dma_dev) |
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return; |
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dw_dma_remove(chip); |
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pci_iounmap(to_pci_dev(chip->dev), chip->regs); |
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} |
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#else /* CONFIG_SERIAL_8250_DMA */ |
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static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {} |
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static void qrk_serial_exit_dma(struct lpss8250 *lpss) {} |
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#endif /* !CONFIG_SERIAL_8250_DMA */ |
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static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) |
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{ |
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qrk_serial_setup_dma(lpss, port); |
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return 0; |
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} |
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static void qrk_serial_exit(struct lpss8250 *lpss) |
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{ |
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qrk_serial_exit_dma(lpss); |
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} |
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static bool lpss8250_dma_filter(struct dma_chan *chan, void *param) |
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{ |
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struct dw_dma_slave *dws = param; |
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if (dws->dma_dev != chan->device->dev) |
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return false; |
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chan->private = dws; |
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return true; |
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} |
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static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port) |
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{ |
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struct uart_8250_dma *dma = &lpss->data.dma; |
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struct dw_dma_slave *rx_param, *tx_param; |
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struct device *dev = port->port.dev; |
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if (!lpss->dma_param.dma_dev) { |
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dma = port->dma; |
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if (dma) |
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goto out_configuration_only; |
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return 0; |
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} |
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rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); |
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if (!rx_param) |
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return -ENOMEM; |
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tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); |
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if (!tx_param) |
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return -ENOMEM; |
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*rx_param = lpss->dma_param; |
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*tx_param = lpss->dma_param; |
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dma->fn = lpss8250_dma_filter; |
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dma->rx_param = rx_param; |
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dma->tx_param = tx_param; |
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port->dma = dma; |
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out_configuration_only: |
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dma->rxconf.src_maxburst = lpss->dma_maxburst; |
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dma->txconf.dst_maxburst = lpss->dma_maxburst; |
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return 0; |
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} |
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static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
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{ |
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struct uart_8250_port uart; |
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struct lpss8250 *lpss; |
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int ret; |
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ret = pcim_enable_device(pdev); |
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if (ret) |
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return ret; |
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pci_set_master(pdev); |
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lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL); |
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if (!lpss) |
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return -ENOMEM; |
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ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); |
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if (ret < 0) |
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return ret; |
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lpss->board = (struct lpss8250_board *)id->driver_data; |
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memset(&uart, 0, sizeof(struct uart_8250_port)); |
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uart.port.dev = &pdev->dev; |
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uart.port.irq = pci_irq_vector(pdev, 0); |
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uart.port.private_data = &lpss->data; |
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uart.port.type = PORT_16550A; |
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uart.port.iotype = UPIO_MEM32; |
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uart.port.regshift = 2; |
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uart.port.uartclk = lpss->board->base_baud * 16; |
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uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
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uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE; |
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uart.port.mapbase = pci_resource_start(pdev, 0); |
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uart.port.membase = pcim_iomap(pdev, 0, 0); |
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if (!uart.port.membase) |
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return -ENOMEM; |
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ret = lpss->board->setup(lpss, &uart.port); |
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if (ret) |
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return ret; |
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dw8250_setup_port(&uart.port); |
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ret = lpss8250_dma_setup(lpss, &uart); |
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if (ret) |
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goto err_exit; |
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ret = serial8250_register_8250_port(&uart); |
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if (ret < 0) |
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goto err_exit; |
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lpss->data.line = ret; |
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pci_set_drvdata(pdev, lpss); |
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return 0; |
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err_exit: |
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lpss->board->exit(lpss); |
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pci_free_irq_vectors(pdev); |
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return ret; |
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} |
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static void lpss8250_remove(struct pci_dev *pdev) |
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{ |
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struct lpss8250 *lpss = pci_get_drvdata(pdev); |
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serial8250_unregister_port(lpss->data.line); |
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lpss->board->exit(lpss); |
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pci_free_irq_vectors(pdev); |
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} |
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static const struct lpss8250_board byt_board = { |
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.freq = 100000000, |
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.base_baud = 2764800, |
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.setup = byt_serial_setup, |
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.exit = byt_serial_exit, |
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}; |
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static const struct lpss8250_board ehl_board = { |
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.freq = 200000000, |
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.base_baud = 12500000, |
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.setup = ehl_serial_setup, |
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.exit = ehl_serial_exit, |
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}; |
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static const struct lpss8250_board qrk_board = { |
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.freq = 44236800, |
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.base_baud = 2764800, |
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.setup = qrk_serial_setup, |
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.exit = qrk_serial_exit, |
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}; |
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static const struct pci_device_id pci_ids[] = { |
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{ PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) }, |
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{ PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(pci, pci_ids); |
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static struct pci_driver lpss8250_pci_driver = { |
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.name = "8250_lpss", |
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.id_table = pci_ids, |
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.probe = lpss8250_probe, |
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.remove = lpss8250_remove, |
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}; |
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module_pci_driver(lpss8250_pci_driver); |
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MODULE_AUTHOR("Intel Corporation"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_DESCRIPTION("Intel LPSS UART driver");
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