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399 lines
12 KiB
399 lines
12 KiB
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) |
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/* Copyright(c) 2021 Intel Corporation */ |
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#include <linux/delay.h> |
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#include <linux/iopoll.h> |
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#include <linux/mutex.h> |
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#include <linux/types.h> |
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#include "adf_accel_devices.h" |
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#include "adf_common_drv.h" |
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#include "adf_gen2_pfvf.h" |
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#include "adf_pfvf_msg.h" |
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#include "adf_pfvf_pf_proto.h" |
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#include "adf_pfvf_vf_proto.h" |
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#include "adf_pfvf_utils.h" |
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/* VF2PF interrupts */ |
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#define ADF_GEN2_VF_MSK 0xFFFF |
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#define ADF_GEN2_ERR_REG_VF2PF(vf_src) (((vf_src) & 0x01FFFE00) >> 9) |
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#define ADF_GEN2_ERR_MSK_VF2PF(vf_mask) (((vf_mask) & ADF_GEN2_VF_MSK) << 9) |
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#define ADF_GEN2_PF_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04)) |
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#define ADF_GEN2_VF_PF2VF_OFFSET 0x200 |
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#define ADF_GEN2_CSR_IN_USE 0x6AC2 |
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#define ADF_GEN2_CSR_IN_USE_MASK 0xFFFE |
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enum gen2_csr_pos { |
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ADF_GEN2_CSR_PF2VF_OFFSET = 0, |
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ADF_GEN2_CSR_VF2PF_OFFSET = 16, |
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}; |
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#define ADF_PFVF_GEN2_MSGTYPE_SHIFT 2 |
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#define ADF_PFVF_GEN2_MSGTYPE_MASK 0x0F |
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#define ADF_PFVF_GEN2_MSGDATA_SHIFT 6 |
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#define ADF_PFVF_GEN2_MSGDATA_MASK 0x3FF |
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static const struct pfvf_csr_format csr_gen2_fmt = { |
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{ ADF_PFVF_GEN2_MSGTYPE_SHIFT, ADF_PFVF_GEN2_MSGTYPE_MASK }, |
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{ ADF_PFVF_GEN2_MSGDATA_SHIFT, ADF_PFVF_GEN2_MSGDATA_MASK }, |
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}; |
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#define ADF_PFVF_MSG_RETRY_DELAY 5 |
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#define ADF_PFVF_MSG_MAX_RETRIES 3 |
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static u32 adf_gen2_pf_get_pfvf_offset(u32 i) |
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{ |
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return ADF_GEN2_PF_PF2VF_OFFSET(i); |
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} |
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static u32 adf_gen2_vf_get_pfvf_offset(u32 i) |
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{ |
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return ADF_GEN2_VF_PF2VF_OFFSET; |
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} |
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static void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) |
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{ |
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/* Enable VF2PF Messaging Ints - VFs 0 through 15 per vf_mask[15:0] */ |
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if (vf_mask & ADF_GEN2_VF_MSK) { |
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u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) |
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& ~ADF_GEN2_ERR_MSK_VF2PF(vf_mask); |
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ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); |
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} |
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} |
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static void adf_gen2_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) |
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{ |
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/* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */ |
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u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) |
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| ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK); |
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ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); |
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} |
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static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) |
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{ |
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u32 sources, disabled, pending; |
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u32 errsou3, errmsk3; |
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/* Get the interrupt sources triggered by VFs */ |
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errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3); |
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sources = ADF_GEN2_ERR_REG_VF2PF(errsou3); |
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if (!sources) |
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return 0; |
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/* Get the already disabled interrupts */ |
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errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3); |
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disabled = ADF_GEN2_ERR_REG_VF2PF(errmsk3); |
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pending = sources & ~disabled; |
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if (!pending) |
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return 0; |
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/* Due to HW limitations, when disabling the interrupts, we can't |
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* just disable the requested sources, as this would lead to missed |
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* interrupts if ERRSOU3 changes just before writing to ERRMSK3. |
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* To work around it, disable all and re-enable only the sources that |
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* are not in vf_mask and were not already disabled. Re-enabling will |
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* trigger a new interrupt for the sources that have changed in the |
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* meantime, if any. |
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*/ |
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errmsk3 |= ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK); |
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ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); |
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errmsk3 &= ADF_GEN2_ERR_MSK_VF2PF(sources | disabled); |
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ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); |
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/* Return the sources of the (new) interrupt(s) */ |
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return pending; |
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} |
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static u32 gen2_csr_get_int_bit(enum gen2_csr_pos offset) |
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{ |
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return ADF_PFVF_INT << offset; |
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} |
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static u32 gen2_csr_msg_to_position(u32 csr_msg, enum gen2_csr_pos offset) |
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{ |
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return (csr_msg & 0xFFFF) << offset; |
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} |
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static u32 gen2_csr_msg_from_position(u32 csr_val, enum gen2_csr_pos offset) |
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{ |
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return (csr_val >> offset) & 0xFFFF; |
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} |
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static bool gen2_csr_is_in_use(u32 msg, enum gen2_csr_pos offset) |
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{ |
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return ((msg >> offset) & ADF_GEN2_CSR_IN_USE_MASK) == ADF_GEN2_CSR_IN_USE; |
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} |
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static void gen2_csr_clear_in_use(u32 *msg, enum gen2_csr_pos offset) |
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{ |
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*msg &= ~(ADF_GEN2_CSR_IN_USE_MASK << offset); |
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} |
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static void gen2_csr_set_in_use(u32 *msg, enum gen2_csr_pos offset) |
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{ |
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*msg |= (ADF_GEN2_CSR_IN_USE << offset); |
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} |
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static bool is_legacy_user_pfvf_message(u32 msg) |
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{ |
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return !(msg & ADF_PFVF_MSGORIGIN_SYSTEM); |
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} |
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static bool is_pf2vf_notification(u8 msg_type) |
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{ |
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switch (msg_type) { |
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case ADF_PF2VF_MSGTYPE_RESTARTING: |
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return true; |
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default: |
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return false; |
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} |
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} |
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static bool is_vf2pf_notification(u8 msg_type) |
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{ |
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switch (msg_type) { |
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case ADF_VF2PF_MSGTYPE_INIT: |
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case ADF_VF2PF_MSGTYPE_SHUTDOWN: |
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return true; |
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default: |
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return false; |
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} |
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} |
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struct pfvf_gen2_params { |
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u32 pfvf_offset; |
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struct mutex *csr_lock; /* lock preventing concurrent access of CSR */ |
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enum gen2_csr_pos local_offset; |
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enum gen2_csr_pos remote_offset; |
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bool (*is_notification_message)(u8 msg_type); |
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u8 compat_ver; |
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}; |
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static int adf_gen2_pfvf_send(struct adf_accel_dev *accel_dev, |
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struct pfvf_message msg, |
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struct pfvf_gen2_params *params) |
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{ |
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void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); |
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enum gen2_csr_pos remote_offset = params->remote_offset; |
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enum gen2_csr_pos local_offset = params->local_offset; |
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unsigned int retries = ADF_PFVF_MSG_MAX_RETRIES; |
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struct mutex *lock = params->csr_lock; |
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u32 pfvf_offset = params->pfvf_offset; |
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u32 int_bit; |
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u32 csr_val; |
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u32 csr_msg; |
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int ret; |
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/* Gen2 messages, both PF->VF and VF->PF, are all 16 bits long. This |
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* allows us to build and read messages as if they where all 0 based. |
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* However, send and receive are in a single shared 32 bits register, |
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* so we need to shift and/or mask the message half before decoding |
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* it and after encoding it. Which one to shift depends on the |
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* direction. |
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*/ |
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int_bit = gen2_csr_get_int_bit(local_offset); |
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csr_msg = adf_pfvf_csr_msg_of(accel_dev, msg, &csr_gen2_fmt); |
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if (unlikely(!csr_msg)) |
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return -EINVAL; |
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/* Prepare for CSR format, shifting the wire message in place and |
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* setting the in use pattern |
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*/ |
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csr_msg = gen2_csr_msg_to_position(csr_msg, local_offset); |
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gen2_csr_set_in_use(&csr_msg, remote_offset); |
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mutex_lock(lock); |
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start: |
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/* Check if the PFVF CSR is in use by remote function */ |
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csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); |
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if (gen2_csr_is_in_use(csr_val, local_offset)) { |
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dev_dbg(&GET_DEV(accel_dev), |
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"PFVF CSR in use by remote function\n"); |
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goto retry; |
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} |
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/* Attempt to get ownership of the PFVF CSR */ |
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ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_msg | int_bit); |
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/* Wait for confirmation from remote func it received the message */ |
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ret = read_poll_timeout(ADF_CSR_RD, csr_val, !(csr_val & int_bit), |
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ADF_PFVF_MSG_ACK_DELAY_US, |
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ADF_PFVF_MSG_ACK_MAX_DELAY_US, |
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true, pmisc_addr, pfvf_offset); |
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if (unlikely(ret < 0)) { |
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dev_dbg(&GET_DEV(accel_dev), "ACK not received from remote\n"); |
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csr_val &= ~int_bit; |
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} |
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/* For fire-and-forget notifications, the receiver does not clear |
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* the in-use pattern. This is used to detect collisions. |
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*/ |
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if (params->is_notification_message(msg.type) && csr_val != csr_msg) { |
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/* Collision must have overwritten the message */ |
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dev_err(&GET_DEV(accel_dev), |
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"Collision on notification - PFVF CSR overwritten by remote function\n"); |
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goto retry; |
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} |
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/* If the far side did not clear the in-use pattern it is either |
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* 1) Notification - message left intact to detect collision |
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* 2) Older protocol (compatibility version < 3) on the far side |
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* where the sender is responsible for clearing the in-use |
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* pattern after the received has acknowledged receipt. |
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* In either case, clear the in-use pattern now. |
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*/ |
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if (gen2_csr_is_in_use(csr_val, remote_offset)) { |
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gen2_csr_clear_in_use(&csr_val, remote_offset); |
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ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val); |
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} |
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out: |
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mutex_unlock(lock); |
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return ret; |
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retry: |
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if (--retries) { |
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msleep(ADF_PFVF_MSG_RETRY_DELAY); |
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goto start; |
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} else { |
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ret = -EBUSY; |
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goto out; |
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} |
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} |
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static struct pfvf_message adf_gen2_pfvf_recv(struct adf_accel_dev *accel_dev, |
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struct pfvf_gen2_params *params) |
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{ |
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void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); |
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enum gen2_csr_pos remote_offset = params->remote_offset; |
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enum gen2_csr_pos local_offset = params->local_offset; |
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u32 pfvf_offset = params->pfvf_offset; |
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struct pfvf_message msg = { 0 }; |
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u32 int_bit; |
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u32 csr_val; |
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u16 csr_msg; |
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int_bit = gen2_csr_get_int_bit(local_offset); |
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/* Read message */ |
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csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset); |
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if (!(csr_val & int_bit)) { |
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dev_info(&GET_DEV(accel_dev), |
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"Spurious PFVF interrupt, msg 0x%.8x. Ignored\n", csr_val); |
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return msg; |
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} |
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/* Extract the message from the CSR */ |
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csr_msg = gen2_csr_msg_from_position(csr_val, local_offset); |
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/* Ignore legacy non-system (non-kernel) messages */ |
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if (unlikely(is_legacy_user_pfvf_message(csr_msg))) { |
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dev_dbg(&GET_DEV(accel_dev), |
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"Ignored non-system message (0x%.8x);\n", csr_val); |
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/* Because this must be a legacy message, the far side |
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* must clear the in-use pattern, so don't do it. |
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*/ |
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return msg; |
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} |
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/* Return the pfvf_message format */ |
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msg = adf_pfvf_message_of(accel_dev, csr_msg, &csr_gen2_fmt); |
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/* The in-use pattern is not cleared for notifications (so that |
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* it can be used for collision detection) or older implementations |
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*/ |
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if (params->compat_ver >= ADF_PFVF_COMPAT_FAST_ACK && |
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!params->is_notification_message(msg.type)) |
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gen2_csr_clear_in_use(&csr_val, remote_offset); |
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/* To ACK, clear the INT bit */ |
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csr_val &= ~int_bit; |
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ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val); |
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return msg; |
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} |
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static int adf_gen2_pf2vf_send(struct adf_accel_dev *accel_dev, struct pfvf_message msg, |
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u32 pfvf_offset, struct mutex *csr_lock) |
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{ |
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struct pfvf_gen2_params params = { |
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.csr_lock = csr_lock, |
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.pfvf_offset = pfvf_offset, |
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.local_offset = ADF_GEN2_CSR_PF2VF_OFFSET, |
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.remote_offset = ADF_GEN2_CSR_VF2PF_OFFSET, |
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.is_notification_message = is_pf2vf_notification, |
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}; |
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return adf_gen2_pfvf_send(accel_dev, msg, ¶ms); |
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} |
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static int adf_gen2_vf2pf_send(struct adf_accel_dev *accel_dev, struct pfvf_message msg, |
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u32 pfvf_offset, struct mutex *csr_lock) |
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{ |
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struct pfvf_gen2_params params = { |
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.csr_lock = csr_lock, |
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.pfvf_offset = pfvf_offset, |
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.local_offset = ADF_GEN2_CSR_VF2PF_OFFSET, |
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.remote_offset = ADF_GEN2_CSR_PF2VF_OFFSET, |
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.is_notification_message = is_vf2pf_notification, |
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}; |
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return adf_gen2_pfvf_send(accel_dev, msg, ¶ms); |
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} |
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static struct pfvf_message adf_gen2_pf2vf_recv(struct adf_accel_dev *accel_dev, |
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u32 pfvf_offset, u8 compat_ver) |
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{ |
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struct pfvf_gen2_params params = { |
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.pfvf_offset = pfvf_offset, |
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.local_offset = ADF_GEN2_CSR_PF2VF_OFFSET, |
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.remote_offset = ADF_GEN2_CSR_VF2PF_OFFSET, |
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.is_notification_message = is_pf2vf_notification, |
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.compat_ver = compat_ver, |
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}; |
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return adf_gen2_pfvf_recv(accel_dev, ¶ms); |
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} |
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static struct pfvf_message adf_gen2_vf2pf_recv(struct adf_accel_dev *accel_dev, |
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u32 pfvf_offset, u8 compat_ver) |
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{ |
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struct pfvf_gen2_params params = { |
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.pfvf_offset = pfvf_offset, |
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.local_offset = ADF_GEN2_CSR_VF2PF_OFFSET, |
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.remote_offset = ADF_GEN2_CSR_PF2VF_OFFSET, |
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.is_notification_message = is_vf2pf_notification, |
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.compat_ver = compat_ver, |
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}; |
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return adf_gen2_pfvf_recv(accel_dev, ¶ms); |
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} |
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void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) |
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{ |
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pfvf_ops->enable_comms = adf_enable_pf2vf_comms; |
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pfvf_ops->get_pf2vf_offset = adf_gen2_pf_get_pfvf_offset; |
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pfvf_ops->get_vf2pf_offset = adf_gen2_pf_get_pfvf_offset; |
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pfvf_ops->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts; |
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pfvf_ops->disable_all_vf2pf_interrupts = adf_gen2_disable_all_vf2pf_interrupts; |
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pfvf_ops->disable_pending_vf2pf_interrupts = adf_gen2_disable_pending_vf2pf_interrupts; |
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pfvf_ops->send_msg = adf_gen2_pf2vf_send; |
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pfvf_ops->recv_msg = adf_gen2_vf2pf_recv; |
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} |
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EXPORT_SYMBOL_GPL(adf_gen2_init_pf_pfvf_ops); |
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void adf_gen2_init_vf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops) |
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{ |
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pfvf_ops->enable_comms = adf_enable_vf2pf_comms; |
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pfvf_ops->get_pf2vf_offset = adf_gen2_vf_get_pfvf_offset; |
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pfvf_ops->get_vf2pf_offset = adf_gen2_vf_get_pfvf_offset; |
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pfvf_ops->send_msg = adf_gen2_vf2pf_send; |
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pfvf_ops->recv_msg = adf_gen2_pf2vf_recv; |
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} |
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EXPORT_SYMBOL_GPL(adf_gen2_init_vf_pfvf_ops);
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