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198 lines
5.9 KiB
198 lines
5.9 KiB
/* |
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* Toshiba RBTX4927 specific interrupt handlers |
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* |
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* Author: MontaVista Software, Inc. |
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* [email protected] |
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* |
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* Copyright 2001-2002 MontaVista Software Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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* |
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR |
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE |
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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* You should have received a copy of the GNU General Public License along |
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* with this program; if not, write to the Free Software Foundation, Inc., |
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* 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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/* |
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* I8259A_IRQ_BASE+00 |
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* I8259A_IRQ_BASE+01 PS2/Keyboard |
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* I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15) |
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* I8259A_IRQ_BASE+03 |
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* I8259A_IRQ_BASE+04 |
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* I8259A_IRQ_BASE+05 |
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* I8259A_IRQ_BASE+06 |
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* I8259A_IRQ_BASE+07 |
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* I8259A_IRQ_BASE+08 |
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* I8259A_IRQ_BASE+09 |
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* I8259A_IRQ_BASE+10 |
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* I8259A_IRQ_BASE+11 |
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* I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time) |
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* I8259A_IRQ_BASE+13 |
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* I8259A_IRQ_BASE+14 IDE |
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* I8259A_IRQ_BASE+15 |
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* |
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* MIPS_CPU_IRQ_BASE+00 Software 0 |
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* MIPS_CPU_IRQ_BASE+01 Software 1 |
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* MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0 |
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* MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use |
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* MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use |
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* MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use |
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* MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use |
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* MIPS_CPU_IRQ_BASE+07 CPU TIMER |
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* |
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* TXX9_IRQ_BASE+00 |
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* TXX9_IRQ_BASE+01 |
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* TXX9_IRQ_BASE+02 |
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* TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC |
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* TXX9_IRQ_BASE+04 |
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* TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet |
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* TXX9_IRQ_BASE+06 |
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* TXX9_IRQ_BASE+07 |
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* TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0 |
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* TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1 |
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* TXX9_IRQ_BASE+10 |
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* TXX9_IRQ_BASE+11 |
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* TXX9_IRQ_BASE+12 |
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* TXX9_IRQ_BASE+13 |
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* TXX9_IRQ_BASE+14 |
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* TXX9_IRQ_BASE+15 |
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* TXX9_IRQ_BASE+16 TX4927 PCI PCI-C |
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* TXX9_IRQ_BASE+17 |
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* TXX9_IRQ_BASE+18 |
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* TXX9_IRQ_BASE+19 |
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* TXX9_IRQ_BASE+20 |
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* TXX9_IRQ_BASE+21 |
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* TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR |
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* TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used) |
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* TXX9_IRQ_BASE+24 |
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* TXX9_IRQ_BASE+25 |
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* TXX9_IRQ_BASE+26 |
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* TXX9_IRQ_BASE+27 |
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* TXX9_IRQ_BASE+28 |
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* TXX9_IRQ_BASE+29 |
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* TXX9_IRQ_BASE+30 |
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* TXX9_IRQ_BASE+31 |
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* |
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* RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge) |
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* RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge) |
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* RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR) |
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* RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4) |
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* RBTX4927_IRQ_IOC+04 |
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* RBTX4927_IRQ_IOC+05 |
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* RBTX4927_IRQ_IOC+06 |
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* RBTX4927_IRQ_IOC+07 |
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* |
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* NOTES: |
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* SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 |
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* SouthBridge/ISA/pin=0 no pci irq used by this device |
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* SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR |
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* via ISA IRQ14 |
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* SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 |
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* SouthBridge/PMC/pin=0 no pci irq used by this device |
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* SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 |
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* SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) |
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* JP7 is not bus master -- do NOT use -- only 4 pci bus master's |
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* allowed -- SouthBridge, JP4, JP5, JP6 |
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*/ |
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#include <linux/init.h> |
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#include <linux/types.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <asm/io.h> |
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#include <asm/mipsregs.h> |
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#include <asm/txx9/generic.h> |
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#include <asm/txx9/rbtx4927.h> |
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static int toshiba_rbtx4927_irq_nested(int sw_irq) |
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{ |
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u8 level3; |
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level3 = readb(rbtx4927_imstat_addr) & 0x1f; |
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if (unlikely(!level3)) |
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return -1; |
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return RBTX4927_IRQ_IOC + __fls8(level3); |
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} |
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static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d) |
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{ |
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unsigned char v; |
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v = readb(rbtx4927_imask_addr); |
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v |= (1 << (d->irq - RBTX4927_IRQ_IOC)); |
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writeb(v, rbtx4927_imask_addr); |
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} |
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static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d) |
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{ |
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unsigned char v; |
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v = readb(rbtx4927_imask_addr); |
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v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC)); |
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writeb(v, rbtx4927_imask_addr); |
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mmiowb(); |
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} |
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#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" |
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static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { |
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.name = TOSHIBA_RBTX4927_IOC_NAME, |
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.irq_mask = toshiba_rbtx4927_irq_ioc_disable, |
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.irq_unmask = toshiba_rbtx4927_irq_ioc_enable, |
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}; |
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static void __init toshiba_rbtx4927_irq_ioc_init(void) |
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{ |
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int i; |
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/* mask all IOC interrupts */ |
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writeb(0, rbtx4927_imask_addr); |
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/* clear SoftInt interrupts */ |
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writeb(0, rbtx4927_softint_addr); |
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for (i = RBTX4927_IRQ_IOC; |
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i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) |
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irq_set_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, |
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handle_level_irq); |
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irq_set_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); |
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} |
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static int rbtx4927_irq_dispatch(int pending) |
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{ |
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int irq; |
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if (pending & STATUSF_IP7) /* cpu timer */ |
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irq = MIPS_CPU_IRQ_BASE + 7; |
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else if (pending & STATUSF_IP2) { /* tx4927 pic */ |
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irq = txx9_irq(); |
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if (irq == RBTX4927_IRQ_IOCINT) |
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irq = toshiba_rbtx4927_irq_nested(irq); |
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} else if (pending & STATUSF_IP0) /* user line 0 */ |
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irq = MIPS_CPU_IRQ_BASE + 0; |
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else if (pending & STATUSF_IP1) /* user line 1 */ |
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irq = MIPS_CPU_IRQ_BASE + 1; |
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else |
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irq = -1; |
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return irq; |
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} |
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void __init rbtx4927_irq_setup(void) |
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{ |
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txx9_irq_dispatch = rbtx4927_irq_dispatch; |
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tx4927_irq_init(); |
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toshiba_rbtx4927_irq_ioc_init(); |
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/* Onboard 10M Ether: High Active */ |
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irq_set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); |
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}
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