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76 lines
1.6 KiB
76 lines
1.6 KiB
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Mediatek SPMI Controller Device Tree Bindings |
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maintainers: |
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- Hsin-Hsiung Wang <[email protected]> |
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description: |+ |
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On MediaTek SoCs the PMIC is connected via SPMI and the controller allows |
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for multiple SoCs to control a single SPMI master. |
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allOf: |
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- $ref: "spmi.yaml" |
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properties: |
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compatible: |
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enum: |
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- mediatek,mt6873-spmi |
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- mediatek,mt8195-spmi |
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reg: |
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maxItems: 2 |
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reg-names: |
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items: |
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- const: pmif |
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- const: spmimst |
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clocks: |
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minItems: 3 |
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maxItems: 3 |
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clock-names: |
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items: |
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- const: pmif_sys_ck |
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- const: pmif_tmr_ck |
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- const: spmimst_clk_mux |
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assigned-clocks: |
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maxItems: 1 |
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assigned-clock-parents: |
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maxItems: 1 |
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required: |
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- compatible |
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- reg |
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- reg-names |
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- clocks |
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- clock-names |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/mt8192-clk.h> |
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spmi: spmi@10027000 { |
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compatible = "mediatek,mt6873-spmi"; |
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reg = <0x10027000 0xe00>, |
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<0x10029000 0x100>; |
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reg-names = "pmif", "spmimst"; |
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clocks = <&infracfg CLK_INFRA_PMIC_AP>, |
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<&infracfg CLK_INFRA_PMIC_TMR>, |
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<&topckgen CLK_TOP_SPMI_MST_SEL>; |
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clock-names = "pmif_sys_ck", |
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"pmif_tmr_ck", |
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"spmimst_clk_mux"; |
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assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; |
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assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>; |
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}; |
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...
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