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150 lines
4.4 KiB
150 lines
4.4 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#" |
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$schema: "http://devicetree.org/meta-schemas/core.yaml#" |
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title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF) |
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maintainers: |
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- Geert Uytterhoeven <[email protected]> |
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allOf: |
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- $ref: serial.yaml# |
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properties: |
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compatible: |
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oneOf: |
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- items: |
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- enum: |
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- renesas,hscif-r8a7778 # R-Car M1 |
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- renesas,hscif-r8a7779 # R-Car H1 |
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- const: renesas,rcar-gen1-hscif # R-Car Gen1 |
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- const: renesas,hscif # generic HSCIF compatible UART |
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- items: |
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- enum: |
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- renesas,hscif-r8a7742 # RZ/G1H |
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- renesas,hscif-r8a7743 # RZ/G1M |
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- renesas,hscif-r8a7744 # RZ/G1N |
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- renesas,hscif-r8a7745 # RZ/G1E |
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- renesas,hscif-r8a77470 # RZ/G1C |
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- renesas,hscif-r8a7790 # R-Car H2 |
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- renesas,hscif-r8a7791 # R-Car M2-W |
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- renesas,hscif-r8a7792 # R-Car V2H |
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- renesas,hscif-r8a7793 # R-Car M2-N |
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- renesas,hscif-r8a7794 # R-Car E2 |
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- const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1 |
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- const: renesas,hscif # generic HSCIF compatible UART |
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- items: |
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- enum: |
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- renesas,hscif-r8a774a1 # RZ/G2M |
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- renesas,hscif-r8a774b1 # RZ/G2N |
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- renesas,hscif-r8a774c0 # RZ/G2E |
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- renesas,hscif-r8a774e1 # RZ/G2H |
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- renesas,hscif-r8a7795 # R-Car H3 |
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- renesas,hscif-r8a7796 # R-Car M3-W |
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- renesas,hscif-r8a77961 # R-Car M3-W+ |
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- renesas,hscif-r8a77965 # R-Car M3-N |
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- renesas,hscif-r8a77970 # R-Car V3M |
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- renesas,hscif-r8a77980 # R-Car V3H |
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- renesas,hscif-r8a77990 # R-Car E3 |
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- renesas,hscif-r8a77995 # R-Car D3 |
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- const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2 |
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- const: renesas,hscif # generic HSCIF compatible UART |
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- items: |
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- enum: |
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- renesas,hscif-r8a779a0 # R-Car V3U |
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- renesas,hscif-r8a779f0 # R-Car S4-8 |
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- renesas,hscif-r8a779g0 # R-Car V4H |
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- const: renesas,rcar-gen4-hscif # R-Car Gen4 |
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- const: renesas,hscif # generic HSCIF compatible UART |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clocks: |
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minItems: 1 |
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maxItems: 4 |
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clock-names: |
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minItems: 1 |
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maxItems: 4 |
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items: |
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enum: |
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- fck # UART functional clock |
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- hsck # optional external clock input |
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- brg_int # optional internal clock source for BRG frequency divider |
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- scif_clk # optional external clock source for BRG frequency divider |
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power-domains: |
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maxItems: 1 |
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resets: |
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maxItems: 1 |
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dmas: |
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minItems: 2 |
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maxItems: 4 |
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description: |
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Must contain a list of pairs of references to DMA specifiers, one for |
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transmission, and one for reception. |
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dma-names: |
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minItems: 2 |
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maxItems: 4 |
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items: |
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enum: |
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- tx |
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- rx |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- clocks |
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- clock-names |
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- power-domains |
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unevaluatedProperties: false |
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if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- renesas,rcar-gen2-hscif |
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- renesas,rcar-gen3-hscif |
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- renesas,rcar-gen4-hscif |
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then: |
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required: |
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- resets |
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examples: |
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- | |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/power/r8a7795-sysc.h> |
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aliases { |
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serial1 = &hscif1; |
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}; |
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hscif1: serial@e6550000 { |
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compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif", |
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"renesas,hscif"; |
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reg = <0xe6550000 96>; |
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>, |
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<&scif_clk>; |
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clock-names = "fck", "brg_int", "scif_clk"; |
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dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>; |
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dma-names = "tx", "rx", "tx", "rx"; |
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
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resets = <&cpg 519>; |
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uart-has-rtscts; |
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};
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