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62 lines
2.2 KiB
62 lines
2.2 KiB
* Nios II Processor Binding |
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This binding specifies what properties available in the device tree |
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representation of a Nios II Processor Core. |
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Users can use sopc2dts tool for generating device tree sources (dts) from a |
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Qsys system. See more detail in: http://www.alterawiki.com/wiki/Sopc2dts |
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Required properties: |
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- compatible: Compatible property value should be "altr,nios2-1.0". |
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- reg: Contains CPU index. |
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- interrupt-controller: Specifies that the node is an interrupt controller |
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- #interrupt-cells: Specifies the number of cells needed to encode an |
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interrupt source, should be 1. |
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- clock-frequency: Contains the clock frequency for CPU, in Hz. |
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- dcache-line-size: Contains data cache line size. |
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- icache-line-size: Contains instruction line size. |
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- dcache-size: Contains data cache size. |
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- icache-size: Contains instruction cache size. |
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- altr,pid-num-bits: Specifies the number of bits to use to represent the process |
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identifier (PID). |
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- altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB. |
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- altr,tlb-num-entries: Specifies the number of entries in the TLB. |
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- altr,tlb-ptr-sz: Specifies size of TLB pointer. |
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- altr,has-mul: Specifies CPU hardware multipy support, should be 1. |
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- altr,has-mmu: Specifies CPU support MMU support, should be 1. |
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- altr,has-initda: Specifies CPU support initda instruction, should be 1. |
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- altr,reset-addr: Specifies CPU reset address |
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- altr,fast-tlb-miss-addr: Specifies CPU fast TLB miss exception address |
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- altr,exception-addr: Specifies CPU exception address |
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Optional properties: |
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- altr,has-div: Specifies CPU hardware divide support |
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- altr,implementation: Nios II core implementation, this should be "fast"; |
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Example: |
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cpu@0 { |
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device_type = "cpu"; |
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compatible = "altr,nios2-1.0"; |
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reg = <0>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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clock-frequency = <125000000>; |
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dcache-line-size = <32>; |
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icache-line-size = <32>; |
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dcache-size = <32768>; |
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icache-size = <32768>; |
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altr,implementation = "fast"; |
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altr,pid-num-bits = <8>; |
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altr,tlb-num-ways = <16>; |
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altr,tlb-num-entries = <128>; |
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altr,tlb-ptr-sz = <7>; |
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altr,has-div = <1>; |
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altr,has-mul = <1>; |
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altr,reset-addr = <0xc2800000>; |
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altr,fast-tlb-miss-addr = <0xc7fff400>; |
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altr,exception-addr = <0xd0000020>; |
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altr,has-initda = <1>; |
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altr,has-mmu = <1>; |
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};
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