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55 lines
1.5 KiB
55 lines
1.5 KiB
Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver |
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Required properties: |
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- compatible: value should be one of the following: |
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"atmel,at91sam9n12-hlcdc" |
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"atmel,at91sam9x5-hlcdc" |
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"atmel,sama5d2-hlcdc" |
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"atmel,sama5d3-hlcdc" |
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"atmel,sama5d4-hlcdc" |
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"microchip,sam9x60-hlcdc" |
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- reg: base address and size of the HLCDC device registers. |
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- clock-names: the name of the 3 clocks requested by the HLCDC device. |
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Should contain "periph_clk", "sys_clk" and "slow_clk". |
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- clocks: should contain the 3 clocks requested by the HLCDC device. |
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- interrupts: should contain the description of the HLCDC interrupt line |
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The HLCDC IP exposes two subdevices: |
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- a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt |
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- a Display Controller: see ../display/atmel/hlcdc-dc.txt |
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Example: |
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hlcdc: hlcdc@f0030000 { |
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compatible = "atmel,sama5d3-hlcdc"; |
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reg = <0xf0030000 0x2000>; |
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clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; |
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clock-names = "periph_clk","sys_clk", "slow_clk"; |
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interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; |
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hlcdc-display-controller { |
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compatible = "atmel,hlcdc-display-controller"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0>; |
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hlcdc_panel_output: endpoint@0 { |
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reg = <0>; |
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remote-endpoint = <&panel_input>; |
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}; |
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}; |
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}; |
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hlcdc_pwm: hlcdc-pwm { |
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compatible = "atmel,hlcdc-pwm"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_lcd_pwm>; |
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#pwm-cells = <3>; |
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}; |
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};
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