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97 lines
3.0 KiB
97 lines
3.0 KiB
* Open PIC Binding |
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This binding specifies what properties must be available in the device tree |
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representation of an Open PIC compliant interrupt controller. This binding is |
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based on the binding defined for Open PIC in [1] and is a superset of that |
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binding. |
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Required properties: |
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NOTE: Many of these descriptions were paraphrased here from [1] to aid |
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readability. |
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- compatible: Specifies the compatibility list for the PIC. The type |
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shall be <string> and the value shall include "open-pic". |
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- reg: Specifies the base physical address(s) and size(s) of this |
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PIC's addressable register space. The type shall be <prop-encoded-array>. |
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- interrupt-controller: The presence of this property identifies the node |
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as an Open PIC. No property value shall be defined. |
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- #interrupt-cells: Specifies the number of cells needed to encode an |
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interrupt source. The type shall be a <u32> and the value shall be 2. |
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- #address-cells: Specifies the number of cells needed to encode an |
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address. The type shall be <u32> and the value shall be 0. As such, |
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'interrupt-map' nodes do not have to specify a parent unit address. |
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Optional properties: |
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- pic-no-reset: The presence of this property indicates that the PIC |
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shall not be reset during runtime initialization. No property value shall |
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be defined. The presence of this property also mandates that any |
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initialization related to interrupt sources shall be limited to sources |
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explicitly referenced in the device tree. |
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* Interrupt Specifier Definition |
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Interrupt specifiers consists of 2 cells encoded as |
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follows: |
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- <1st-cell>: The interrupt-number that identifies the interrupt source. |
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- <2nd-cell>: The level-sense information, encoded as follows: |
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0 = low-to-high edge triggered |
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1 = active low level-sensitive |
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2 = active high level-sensitive |
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3 = high-to-low edge triggered |
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* Examples |
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Example 1: |
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/* |
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* An Open PIC interrupt controller |
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*/ |
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mpic: pic@40000 { |
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// This is an interrupt controller node. |
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interrupt-controller; |
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// No address cells so that 'interrupt-map' nodes which reference |
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// this Open PIC node do not need a parent address specifier. |
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#address-cells = <0>; |
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// Two cells to encode interrupt sources. |
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#interrupt-cells = <2>; |
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// Offset address of 0x40000 and size of 0x40000. |
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reg = <0x40000 0x40000>; |
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// Compatible with Open PIC. |
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compatible = "open-pic"; |
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// The PIC shall not be reset. |
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pic-no-reset; |
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}; |
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Example 2: |
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/* |
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* An interrupt generating device that is wired to an Open PIC. |
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*/ |
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serial0: serial@4500 { |
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// Interrupt source '42' that is active high level-sensitive. |
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// Note that there are only two cells as specified in the interrupt |
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// parent's '#interrupt-cells' property. |
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interrupts = <42 2>; |
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// The interrupt controller that this device is wired to. |
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interrupt-parent = <&mpic>; |
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}; |
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* References |
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[1] Devicetree Specification |
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(https://www.devicetree.org/specifications/) |
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