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119 lines
2.5 KiB
119 lines
2.5 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#" |
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$schema: "http://devicetree.org/meta-schemas/core.yaml#" |
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title: Loongson Local I/O Interrupt Controller |
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maintainers: |
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- Jiaxun Yang <[email protected]> |
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description: | |
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This interrupt controller is found in the Loongson-3 family of chips and |
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Loongson-2K1000 chip, as the primary package interrupt controller which |
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can route local I/O interrupt to interrupt lines of cores. |
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allOf: |
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- $ref: /schemas/interrupt-controller.yaml# |
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properties: |
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compatible: |
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enum: |
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- loongson,liointc-1.0 |
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- loongson,liointc-1.0a |
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- loongson,liointc-2.0 |
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reg: |
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minItems: 1 |
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maxItems: 3 |
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reg-names: |
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items: |
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- const: main |
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- const: isr0 |
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- const: isr1 |
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interrupt-controller: true |
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interrupts: |
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description: |
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Interrupt source of the CPU interrupts. |
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minItems: 1 |
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maxItems: 4 |
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interrupt-names: |
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description: List of names for the parent interrupts. |
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items: |
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- const: int0 |
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- const: int1 |
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- const: int2 |
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- const: int3 |
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minItems: 1 |
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'#interrupt-cells': |
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const: 2 |
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'loongson,parent_int_map': |
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description: | |
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This property points how the children interrupts will be mapped into CPU |
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interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 |
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and each bit in the cell refers to a child interrupt from 0 to 31. |
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If a CPU interrupt line didn't connect with liointc, then keep its |
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cell with zero. |
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$ref: /schemas/types.yaml#/definitions/uint32-array |
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minItems: 4 |
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maxItems: 4 |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- interrupt-controller |
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- '#interrupt-cells' |
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- 'loongson,parent_int_map' |
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unevaluatedProperties: false |
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if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- loongson,liointc-2.0 |
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then: |
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properties: |
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reg: |
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minItems: 3 |
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required: |
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- reg-names |
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else: |
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properties: |
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reg: |
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maxItems: 1 |
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examples: |
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- | |
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iointc: interrupt-controller@3ff01400 { |
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compatible = "loongson,liointc-1.0"; |
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reg = <0x3ff01400 0x64>; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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interrupt-parent = <&cpuintc>; |
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interrupts = <2>, <3>; |
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interrupt-names = "int0", "int1"; |
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loongson,parent_int_map = <0xf0ffffff>, /* int0 */ |
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<0x0f000000>, /* int1 */ |
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<0x00000000>, /* int2 */ |
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<0x00000000>; /* int3 */ |
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}; |
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...
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