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133 lines
3.3 KiB
133 lines
3.3 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Samsung's High Speed I2C controller |
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maintainers: |
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- Krzysztof Kozlowski <[email protected]> |
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description: | |
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The Samsung's High Speed I2C controller is used to interface with I2C devices |
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at various speeds ranging from 100kHz to 3.4MHz. |
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In case the HSI2C controller is encapsulated within USI block (it's the case |
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e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to |
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define USI node in device tree file, choosing "i2c" configuration. Please see |
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Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. |
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properties: |
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compatible: |
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oneOf: |
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- enum: |
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- samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 |
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- samsung,exynos5260-hsi2c # Exynos5260 |
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- samsung,exynos7-hsi2c # Exynos7 |
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- samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850 |
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- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 |
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deprecated: true |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clock-frequency: |
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default: 100000 |
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description: |
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Desired operating frequency in Hz of the bus. |
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If not specified, the bus operates in fast-speed mode at 100kHz. |
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If specified, the bus operates in high-speed mode only if the |
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clock-frequency is >= 1MHz. |
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clocks: |
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minItems: 1 |
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items: |
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- description: I2C operating clock |
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- description: Bus clock (APB) |
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clock-names: |
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minItems: 1 |
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items: |
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- const: hsi2c |
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- const: hsi2c_pclk |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- clocks |
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allOf: |
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- $ref: /schemas/i2c/i2c-controller.yaml# |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- samsung,exynosautov9-hsi2c |
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then: |
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properties: |
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clocks: |
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minItems: 2 |
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clock-names: |
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minItems: 2 |
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required: |
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- clock-names |
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else: |
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properties: |
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clocks: |
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maxItems: 1 |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/exynos5420.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/interrupt-controller/irq.h> |
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hsi2c_8: i2c@12e00000 { |
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compatible = "samsung,exynos5250-hsi2c"; |
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reg = <0x12e00000 0x1000>; |
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clock-frequency = <100000>; |
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clocks = <&clock CLK_USI4>; |
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clock-names = "hsi2c"; |
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pmic@66 { |
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/* compatible = "samsung,s2mps11-pmic"; */ |
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reg = <0x66>; |
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}; |
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}; |
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- | |
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#include <dt-bindings/clock/exynos850.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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hsi2c_2: i2c@138c0000 { |
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compatible = "samsung,exynosautov9-hsi2c"; |
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reg = <0x138c0000 0xc0>; |
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interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, |
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<&cmu_peri CLK_GOUT_HSI2C2_PCLK>; |
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clock-names = "hsi2c", "hsi2c_pclk"; |
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pmic@66 { |
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/* compatible = "samsung,s2mps11-pmic"; */ |
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reg = <0x66>; |
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}; |
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};
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