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146 lines
3.4 KiB
146 lines
3.4 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: I2C for Atmel/Microchip platforms |
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maintainers: |
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- Alexandre Belloni <[email protected]> |
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properties: |
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compatible: |
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oneOf: |
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- items: |
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- enum: |
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- atmel,at91rm9200-i2c |
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- atmel,at91sam9261-i2c |
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- atmel,at91sam9260-i2c |
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- atmel,at91sam9g20-i2c |
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- atmel,at91sam9g10-i2c |
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- atmel,at91sam9x5-i2c |
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- atmel,sama5d4-i2c |
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- atmel,sama5d2-i2c |
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- microchip,sam9x60-i2c |
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- items: |
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- const: microchip,sama7g5-i2c |
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- const: microchip,sam9x60-i2c |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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"#address-cells": |
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const: 1 |
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"#size-cells": |
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const: 0 |
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clocks: |
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maxItems: 1 |
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clock-frequency: |
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default: 100000 |
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dmas: |
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items: |
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- description: TX DMA Channel Specifier |
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- description: RX DMA Channel Specifier |
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dma-names: |
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items: |
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- const: tx |
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- const: rx |
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atmel,fifo-size: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: | |
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Maximum number of data the RX and TX FIFOs can store for |
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FIFO capable I2C controllers. |
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scl-gpios: true |
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sda-gpios: true |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- "#address-cells" |
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- "#size-cells" |
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- clocks |
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allOf: |
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- $ref: "i2c-controller.yaml" |
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- if: |
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properties: |
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compatible: |
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contains: |
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enum: |
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- atmel,sama5d4-i2c |
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- atmel,sama5d2-i2c |
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- microchip,sam9x60-i2c |
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- microchip,sama7g5-i2c |
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then: |
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properties: |
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i2c-sda-hold-time-ns: |
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description: |
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TWD hold time |
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maxItems: 1 |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/dma/at91.h> |
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#include <dt-bindings/gpio/gpio.h> |
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i2c0: i2c@fff84000 { |
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compatible = "atmel,at91sam9g20-i2c"; |
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reg = <0xfff84000 0x100>; |
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clocks = <&twi0_clk>; |
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clock-frequency = <400000>; |
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eeprom@50 { |
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compatible = "atmel,24c512"; |
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reg = <0x50>; |
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pagesize = <128>; |
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}; |
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}; |
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i2c1: i2c@f8034600 { |
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compatible = "atmel,sama5d2-i2c"; |
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reg = <0xf8034600 0x100>; |
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interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; |
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dmas = <&dma0 |
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) |
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AT91_XDMAC_DT_PERID(11)>, |
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<&dma0 |
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(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) |
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AT91_XDMAC_DT_PERID(12)>; |
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dma-names = "tx", "rx"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clocks = <&flx0>; |
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atmel,fifo-size = <16>; |
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i2c-sda-hold-time-ns = <336>; |
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pinctrl-names = "default", "gpio"; |
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pinctrl-0 = <&pinctrl_i2c0>; |
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pinctrl-1 = <&pinctrl_i2c0_gpio>; |
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sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; |
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scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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eeprom@54 { |
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compatible = "atmel,24c02"; |
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reg = <0x54>; |
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pagesize = <16>; |
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}; |
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};
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